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This reverts commit 0aa998b2ab6fdfe139b54de9868e2383440685d0.
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glxgears and googleearth now run so that seems like a good start
Thanks to Aapo Tahkola for doing the 3D work on this so far, I got lost
after the GART changes.
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dereferences it.
Same fix as for r300 (which fixed https://bugs.freedesktop.org/show_bug.cgi?id=10417),
since it's likely an issue with those drivers too.
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ARB_vertex_buffer_object looks like a useful extension even for old chips.
The drivers should not need any code to be able to use this extension since
they just use mesa's vbo code anyway.
Newly enabled for i810, mach64, mga, r128, radeon, savage, sis and unichrome.
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Use _mesa_reference_framebuffer() and _mesa_unreference_framebuffer() functions
to be sure reference counting is done correctly. Additional assertions are
done too. Note _mesa_dereference_framebuffer() renamed to "unreference" as
that's more accurate.
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Getting proper SIN and COS wasn't as easy as it appeared.
I had to make make some changes to the fragment program code.
general FP changes:
- support HHH swizzle for vector instructions.
- don't copy a source to a temp when it is not XYZW swizzled, but
combine the two and have the swizzle resolve any issues.
(saves temps/instructions with more elaborate shader code)
- fix overflow in cnstv[].
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Conflicts:
src/mesa/main/texcompress_s3tc.c
src/mesa/tnl/t_array_api.c
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into vbo-0.2
Conflicts:
src/mesa/array_cache/sources
src/mesa/drivers/dri/i965/brw_context.c
src/mesa/drivers/dri/i965/brw_draw.c
src/mesa/drivers/dri/i965/brw_fallback.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/i965/brw_vs_tnl.c
src/mesa/drivers/dri/mach64/mach64_context.c
src/mesa/main/extensions.c
src/mesa/main/getstring.c
src/mesa/tnl/sources
src/mesa/tnl/t_save_api.c
src/mesa/tnl/t_save_playback.c
src/mesa/tnl/t_vtx_api.c
src/mesa/tnl/t_vtx_exec.c
src/mesa/vbo/vbo_attrib.h
src/mesa/vbo/vbo_exec_api.c
src/mesa/vbo/vbo_save_api.c
src/mesa/vbo/vbo_save_draw.c
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Added code to track the drawable bound to the context for reading. In
addition, when a drawable is initially bound (for reading or drawing)
or when the size of the drawable changes, update the size of the
framebuffer object that back the drawable (for software fallbacks).
Deprecate the old GetBufferSize interface.
Bump the driver date.
These changes were tested with wincopy on both direct rendering and
accelerated indirect rendering (AIGLX).
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The coordinates need to be computed after we've got the hw lock.
Code updated to:
1. Ignore all/x/y/width/height/ params passed to Clear func.
2. Pass 0,0,0,0,0 to _swrast_Clear() until they're totally removed.
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four rgba values set for radeon and r200 (discovered with a modified glean pixelFormats test, noone ever noticed in over 2 years). For radeon, use hw format I8 as previously, and change tex env to make the correct default values appear for both GL_ALPHA and GL_LUMINANCE textures. For r200, which supports GL_LUMINANCE just fine, use the AL88 hw format for GL_ALPHA textures, since it seems like it's probably not worth the effort to fix up the texture environment (certainly complicated in case of ATI_fragment_shader programs).
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This is already done by the preceeding call to _mesa_init_driver_functions()
which plugs in default functions like that.
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nearly the same as outlined in bug #4707, except it disables perspective correction for point sprites to make them actually work. And, separate the state atom into two as the tcl parameters would overwrite vertex program parameters when active. Also implement the GL_VERTEX_PROGRAM_POINT_SIZE_ARB option to make vertex programs outputting a point size work correctly (untested). Smooth points will still always be size 1. While here, enable gouraud shading for fog when using fog coord.
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This prevents the first wait for vertical blank from timing out when the X
server has been running for a long time.
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faster memcopy path in mesa (at least on little endian systems, possibly on big endian too)
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ensures texture cache gets flushed in case the new texture has the same offset as the old one (fixes glean pixelFormat test at least on r200).
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we call the blend/logic op functions. Fixes glean logicOp test on r200.
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targets (swtcl tex coord translation stage, tcl tex matrix adaption) and use the chip's native handling of such coords instead (!!!). Seems noone noticed those bits in the se_coord_fmt reg, even though it works fairly similar to r200 (except it's set per-unit and always active, so only enable it for texture rectangles).
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conversion appears only to work on first unit.
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drivers, otherwise we'll mix up tcl and vtxfmt path for some reason. This fixes a warzone2100 asssertion failure.
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It does 2 things:
1) Allows you to disable S3TC, wine-games sometimes need S3TC enabled.
2) Disable fallbacks that usually have low impact.
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not new enough on r200
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request at least drmMinor 6 anyway.
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intention as drm seems to never return EAGAIN) in all radeon drivers.
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instead of 8k (the reasons why it was exactly 8k are unclear). Add register defines, sanity code, fix potential issue with wrong statechange order when disabling fragment programs.
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