Age | Commit message (Collapse) | Author |
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into vbo-0.2
Conflicts:
src/mesa/array_cache/sources
src/mesa/drivers/dri/i965/brw_context.c
src/mesa/drivers/dri/i965/brw_draw.c
src/mesa/drivers/dri/i965/brw_fallback.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/i965/brw_vs_tnl.c
src/mesa/drivers/dri/mach64/mach64_context.c
src/mesa/main/extensions.c
src/mesa/main/getstring.c
src/mesa/tnl/sources
src/mesa/tnl/t_save_api.c
src/mesa/tnl/t_save_playback.c
src/mesa/tnl/t_vtx_api.c
src/mesa/tnl/t_vtx_exec.c
src/mesa/vbo/vbo_attrib.h
src/mesa/vbo/vbo_exec_api.c
src/mesa/vbo/vbo_save_api.c
src/mesa/vbo/vbo_save_draw.c
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Added code to track the drawable bound to the context for reading. In
addition, when a drawable is initially bound (for reading or drawing)
or when the size of the drawable changes, update the size of the
framebuffer object that back the drawable (for software fallbacks).
Deprecate the old GetBufferSize interface.
Bump the driver date.
These changes were tested with wincopy on both direct rendering and
accelerated indirect rendering (AIGLX).
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The coordinates need to be computed after we've got the hw lock.
Code updated to:
1. Ignore all/x/y/width/height/ params passed to Clear func.
2. Pass 0,0,0,0,0 to _swrast_Clear() until they're totally removed.
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four rgba values set for radeon and r200 (discovered with a modified glean pixelFormats test, noone ever noticed in over 2 years). For radeon, use hw format I8 as previously, and change tex env to make the correct default values appear for both GL_ALPHA and GL_LUMINANCE textures. For r200, which supports GL_LUMINANCE just fine, use the AL88 hw format for GL_ALPHA textures, since it seems like it's probably not worth the effort to fix up the texture environment (certainly complicated in case of ATI_fragment_shader programs).
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This is already done by the preceeding call to _mesa_init_driver_functions()
which plugs in default functions like that.
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nearly the same as outlined in bug #4707, except it disables perspective correction for point sprites to make them actually work. And, separate the state atom into two as the tcl parameters would overwrite vertex program parameters when active. Also implement the GL_VERTEX_PROGRAM_POINT_SIZE_ARB option to make vertex programs outputting a point size work correctly (untested). Smooth points will still always be size 1. While here, enable gouraud shading for fog when using fog coord.
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This prevents the first wait for vertical blank from timing out when the X
server has been running for a long time.
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faster memcopy path in mesa (at least on little endian systems, possibly on big endian too)
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ensures texture cache gets flushed in case the new texture has the same offset as the old one (fixes glean pixelFormat test at least on r200).
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we call the blend/logic op functions. Fixes glean logicOp test on r200.
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targets (swtcl tex coord translation stage, tcl tex matrix adaption) and use the chip's native handling of such coords instead (!!!). Seems noone noticed those bits in the se_coord_fmt reg, even though it works fairly similar to r200 (except it's set per-unit and always active, so only enable it for texture rectangles).
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conversion appears only to work on first unit.
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drivers, otherwise we'll mix up tcl and vtxfmt path for some reason. This fixes a warzone2100 asssertion failure.
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It does 2 things:
1) Allows you to disable S3TC, wine-games sometimes need S3TC enabled.
2) Disable fallbacks that usually have low impact.
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not new enough on r200
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request at least drmMinor 6 anyway.
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intention as drm seems to never return EAGAIN) in all radeon drivers.
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instead of 8k (the reasons why it was exactly 8k are unclear). Add register defines, sanity code, fix potential issue with wrong statechange order when disabling fragment programs.
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Generate GL_INVALID_VALUE, not GL_INVALID_ENUM when glVertexAttrib is called
with a bad index.
Use _mesa_noop_vtxfmt_init() in DRI drivers to initialize vertex format
struct.
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of requesting executable stacks.
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- use macros to access and modify render inputs bit-field;
- un-alias generic vertex attributes for ARB vertex calls;
- use MAX_VERTEX_PROGRAM_ATTRIBS (NV code) or MAX_VERTEX_ATTRIBS
(ARB code) in place of VERT_ATTRIB_MAX;
- define VERT_ATTRIB_GENERIC0..15 for un-aliased vertex
attributes for ARB_vertex_shader;
- fix generic attribute index range check in arbprogparse.c;
- interface GLSL varyings between vertex and fragment shader;
- use 64-bit optimised bitset (bitset.h) for render inputs;
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DestroyTexObj has a dependence on the glCtx and may segfault otherwise.
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to need 1.6 drm where this first appeared.. this fixes r300 on PCIE
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(reported by Jim Duchek). Fix some potential problems with strict-aliasing with r200 and radeon drivers in *UpdateViewportOffset, *PolygonOffset and *UpdateWindow functions (some compiler warnings about strict-aliasing remain in the codegen vertex code, and there may be more problems unnoticed by the compiler).
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enable all texture units by default on those cards (3 for radeon, 6 for r200). Fix the usually forgotten DRIVER_DATE accordingly.
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known by ddx (probably secondary ids, non-existant cards and similar). Add rs400 to the family enum, and configure the rv410 like a 2 quad chip (?)
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radeon driver when a tcl fallback is active, fixes a blender issue with non-tcl hw (bug #5601)
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with different methods to calculate the announced maximum texture sizes. Default is still the same (that is, radeon/r200 default to not announce anything which might not fit, i830/i915 default to 1 texture must fit). Bug #5785.
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