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about 200 lines from the code and 25k from the binary, while matching other
drivers more closely. In the worst case (tcl_mode=0) it appears to have
a performance cost of 4.4% +/- 0.3% on quake3 (800x600 demofours, 1ghz p3,
rv200). Tested on ut2004, ut, q3, projtex.
Submitted by: Andreas Stenglein <a.stenglein@gmx.net>
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Main driver impacts:
- new code for creating the Mesa GLframebuffer
- new span/pixel read/write code
Some drivers not yet updated/tested.
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Whitwell says, "[T]he radeon subset code can probably be archived now."
This "fixes" bug #1623.
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Inc.)
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From: Stephane Marchesin
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make ycbcr depend on a CHIPSET define .. needs to be filled in though
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performance up to 15% in texture-intensive applications. Convert the driver to use the correct blit format and blit width instead of fixed blit format and blit width when uploading textures to make it work.
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r200) sanity code
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radeon and r200 driver
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state change patches....
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fast z clear and z buffer compression are supported for now, hierarchical-z is not. Still problems with multiple apps and z/stencil readback, which is why hyperz is disabled per default. Also add the new point sprite packet drm 1.13 accepts to the sanity code.
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Attached is a patch that adds pci init code for mesa solo on radeon. It's been
tested on an itanium 2 with a radeon 7000 and it works here.
The patch adds a new field in the miniglx.conf config file, to choose between
pci and agp.
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original radeons which have some broken stencil ops.
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Now, the driver's Viewport routine should call _mesa_ResizeBuffersMESA()
if necessary.
Cleaned up code related to GLframebuffer width/height initialization.
Set initial viewport/scissor params in _mesa_make_current2(), instead of
in the drivers' MakeCurrent functions.
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hopefully fixes lockups (?) (from r200 driver)
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emitted, that clear would
happen before any state had been set, causing a hang later on. Fix this by
calling radeonFlush instead of FIREVERTICES (which checks if any state has been
emitted but not flushed, before calling Flush) in radeonClear. While here, add
some more debugging info which was useful, and remove an unnecessary
save/restore in BackUpAndEmit.
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and enable hardware quads on r200 and radeon. samples/prim renders quads
correctly now.
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and ignored for 1D and 2D images.
Need to pass in image dimensions (1,2,3) to the _mesa_image_address() function.
This change gets propogated to some other routines.
Also added new _mesa_image_address[123]d() convenience functions.
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(patented) S3TC/DXTC algorithms, but adds an option to dlopen a library module
providing functions to do so. Because it uses dlopen, it is only enabled if
USE_EXTERNAL_DXTN_LIB=1 is defined (which is only in linux-dri config, so far).
It adds support for S3TC to several DRI drivers, and adds a DRI config option to
force enabling S3TC even if the software compression/decompression is
unavailable. This may allow people to use apps that require S3TC even though
they don't have a license to implement the patented material themselves, if
those apps use precompressed textures.
Ideally we would get permission from the current holder of the patents to
implement the algorithm in Mesa, at which point the dlopen mess could go away.
Until then, this allows some to run applications they couldn't otherwise, and
hopefully will provide us with more push to get the final step of getting that
permission done.
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state in a ready-to-emit cmdbuf, which avoids the issue Nicolai Haehnle reported
where the check() could return differently during backup-and-emit than it should
have if it were called at the right time. Move the lit emission before most of
the TCL state emission on r200, which fixes neverball issues.
Tested with: r100/r200 with neverball, tuxracer, chromium, quake3, ipers
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a new cmdbuf, to ensure that state wasn't lost across UNLOCK/LOCK pairs (in the
case of context switching). This was rather inefficient. Instead, after
flushing a cmdbuf, mark the state as needing to be saved on unlock. Then, at
the beginning of flushing a cmdbuf, if we actually have lost the context, go
back and emit a new cmdbuf with the full set of state, before continuing with
the cmdbuf flush. Provides a 10-15% improvement in ipers performance in my
tests, along with other apps.
Tested with: ipers, glxgears, quake3
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last commit. I've been convinced by keithw that it's sufficient, and put a note
in the code about it.
Close another race for state in the Clear functions. I made the situation worse
in my last commit, but this should fix things. Might be a slight performance
hit, which could be regained by splitting the R*_FIREVERTICES calls in r*Clear
up so that the EmitState doesn't happen in a separate new cmdbuf.
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errors on r100 and rendering errors and hangs on r200 (same for R100 without
OLD_PACKETS).
If a command buffer filled after some state (EmitState or a VBPNTR write) was
emitted, the lock was grabbed, the buffer flushed, a new buffer prepared, and
the lock dropped. Another client could come in, set its own state as part of
rendering, and when the first client flushed the rendering commands depending
on the previous state, it got the 2nd client's state. This is fixed by checking
for enough space before beginning a set of state emits and rendering, and
flushing the buffer first if so. This guarantees that the buffer won't wrap.
Also, move the "lost_context = 1" from the end of cmdbuf flushing to
UNLOCK_HARDWARE for clarity (at a minimum) that any time the lock is dropped,
state may get overwritten. We don't have enough information at the point of the
LOCK_HARDWARE to reset our state to the last UNLOCK_HARDWARE point in the case
that we did lose our context, but saving the information to rebuild that state
may be a useful optimization (ipers data suggests up to 5%).
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