Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-07-15 | Use memcpy directly in the common code | Alex Deucher | |
This alleviates the need for an additional symbol. | |||
2009-07-14 | R6xx/r7xx: implement memcpy buffer swaps | Alex Deucher | |
This allows double buffered apps to run, but perfomance will be awful until we implement something faster. You must update to the latest kernel modules. | |||
2009-07-14 | R6xx/R7xx: no irqs yet. | Alex Deucher | |
2009-07-08 | Fix buffer age implementaion bug. | Richard Li | |
2009-07-07 | r6xx/r7xx: add sw blit for tex upload | Alex Deucher | |
Can be used for buffer swap as well. | |||
2009-07-06 | R6xx/r7xx: first pass at texture support | Alex Deucher | |
texture bo setup isn't quite working yet | |||
2009-06-12 | Merge master and fix conflicts | Alex Deucher | |
2009-06-12 | radeon: fix size of mipmap texture array | Dave Airlie | |
2009-06-12 | radeon/r200/r300: fix max texture levels assert | Dave Airlie | |
use the actual value set in the context | |||
2009-06-11 | Add RV740 support | Alex Deucher | |
2009-06-11 | radeon: increase max bo count | Maciej Cencora | |
2009-06-10 | move radeon_set_screen_flags() up so CHIP_FAMILY is set before using it | Alex Deucher | |
fixes last commit. | |||
2009-06-10 | Use correct scratch reg offset for r6xx/r7xx | Alex Deucher | |
2009-06-09 | radeon: fix mipmap_limits crasher. | Dave Airlie | |
This gets the correct srclvl image map when uploading images to the new mipmap. | |||
2009-06-01 | radeon: Provide a more detailled GL_RENDERER string. | Nicolai Hähnle | |
Display the chip family and PCI ID. This can be parsed easily, and essentially all information that the driver has about the chip can be deduced from it. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com> | |||
2009-05-27 | radeon: emit scissor before emiting vertices | Jerome Glisse | |
2009-05-27 | radeon: emit scissor when using cs submission style. | Jerome Glisse | |
2009-05-26 | fix segfault when running glxinfo | Alex Deucher | |
2009-05-26 | add missing RS780 pci id | Alex Deucher | |
2009-05-26 | fix build when HAVE_LIBDRM_RADEON is defined | Alex Deucher | |
2009-05-25 | radeon: on update drawable don't firevertices as it might be call from GetLock | Jerome Glisse | |
To avoid locking bug we shouldn't not call firevertices from this path as it's call from radeon get lock. | |||
2009-05-24 | radeon: realloc dma if needed after revalidate | Jerome Glisse | |
Revalidate can trigger flushing and dma buffer deallocation, so retry allocation on such case. | |||
2009-05-24 | radeon: Remove drawable & readable from radeon_dri_mirror | Nicolai Hähnle | |
The duplication of state data caused a crash due to double-free on destruction of context, because a variable wasn't correctly null'ed out. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com> | |||
2009-05-22 | radeon: reading back to scratch reg through status map doesn't work | Jerome Glisse | |
For some unknown reasons the scratch reg value doesn't endup in the status map at the scratch reg offset, this is a temporary work around until we figure out why it doesn't work. | |||
2009-05-21 | radeon: maxbuffer size is in bytes | Jerome Glisse | |
2009-05-20 | r200: fix vbo array rendering | Jerome Glisse | |
2009-05-20 | radeon: Increase reference count of current renderbuffers. | Michel Dänzer | |
Fixes glxinfo: main/renderbuffer.c:2159: _mesa_reference_renderbuffer: Assertion `oldRb->Magic == 0xaabbccdd' failed. | |||
2009-05-20 | radeon: set max texture size | Jerome Glisse | |
This still need some work to actually report somethings reasonable if no memory manager is available. | |||
2009-05-19 | Makeup checkin for radeon code change paired with r6/7 code. | root | |
2009-05-15 | Fix r6 code bugs. | Richard Li | |
2009-05-13 | R1xx/r2xx: Don't use an alpha texture format for GLX_TEXTURE_FORMAT_RGB_EXT | Alex Deucher | |
In r*00SetTexBuffer2(), if the passed in text glx_texture_format is GLX_TEXTURE_FORMAT_RGB_EXT, then we should use an RGB-only texture format, even if the DRI buffer has four channels. https://bugs.freedesktop.org/show_bug.cgi?id=21609 | |||
2009-05-13 | radeon: Don't crash generating mipmaps when pixels=NULL | Owen W. Taylor | |
When a NULL value of pixels is passed to TexImage2D and SGIS_generate_mipmap is enabled, don't try to generate the mipmap tree: we don't have data yet for the texture and will crash. https://bugs.freedesktop.org/show_bug.cgi?id=21648 | |||
2009-05-13 | Call _mesa_update_stencil() before accessing ctx->Stencil._Enabled | Owen W. Taylor | |
ctx->Stencil._Enabled is derived state and not immediately updated when the stencil parameters are changed; we need to make sure that it is up-to-date before accessing it. https://bugs.freedesktop.org/show_bug.cgi?id=21608 | |||
2009-05-12 | radeon: glReadBuffer set _NEW_BUFFERS, not _NEW_PIXEL | Jerome Glisse | |
This was broken with last merge see 62043b27575c378c027251316421e4699f461108 for explanations | |||
2009-05-12 | radeon: avoid segfault in radeon_update_renderbuffers() if using DRI1 | Tormod Volden | |
Basically the same as 43d9020ff1e975e7f4f9480d9ef24f0b9fb2141f for intel. Bug 21688. Signed-off-by: Tormod Volden <debian.tormod@gmail.com> | |||
2009-05-10 | radeon: add support for new dri2 interfaces & fix single buffer rendering | Joel Bosveld | |
2009-05-09 | radeon: don't include cs uncondionaly | Jerome Glisse | |
2009-05-08 | R6xx/R7xx: WIP r6xx-rewrite code | Richard Li | |
2009-05-08 | radeon: IRQ always enabled in DRI2 path no need to query kernel for it | Jerome Glisse | |
2009-05-07 | r300: fix compiler warnings | Maciej Cencora | |
2009-05-06 | When clearing the stencil buffer, don't use a two-sided stencil | Owen W. Taylor | |
In radeon_clear_tris(), when clearing the stencil buffer, pass GL_FRONT_AND_BACK to _mesa_StencilFuncSeparate(), to avoid triggering a software fallback on r300 and below. https://bugs.freedesktop.org/show_bug.cgi?id=21601 | |||
2009-05-06 | radeon: hopefully fixup radeon cube state emission for kms | Dave Airlie | |
2009-05-06 | r100/r200: try and allocate miptree correct for hw. | Dave Airlie | |
This doesn't make things worse but according to sroland it is how the GPU hw expects things on the r100/r200 | |||
2009-05-05 | radeon/r200: enable all the optional drm support bits | Dave Airlie | |
2009-05-04 | r300: set proper texture row alignment for IGP chips | Maciej Cencora | |
Looks like r400 based IGP chips require 64 byte alignment | |||
2009-04-28 | R300: add quadpipe overrides | Alex Deucher | |
RV410 SE chips only have 1 quadpipe. Also, handle other R300 chip with quadpipe override. | |||
2009-04-28 | radeno: cleanup the startup path further | Dave Airlie | |
2009-04-28 | radeon: further cleanup dri1 screen init | Dave Airlie | |
2009-04-28 | radeon: remove kernel mm, dri2 path takes care of it | Dave Airlie | |
2009-04-27 | r300: fix valgrind warnings | Maciej Cencora | |