| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-09-24 | r600: various cleanups | Alex Deucher | |
| - max texture size is 8k, but mesa doesn't support that at the moment. - attempt to set shader limits to what the hw actually supports - clean up some old r300 cruft - no need to explicitly disable irqs. This is fixed in the drm now. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> | |||
| 2009-09-24 | r600: fix some issues with LIT instruction | Andre Maasikas | |
| - MUL_LIT is ALU.Trans instruction - some Trans instructions can take 3 arguments - don't clobber dst.x, use dst.z as temp, it'll get written correct value in last insn - respect source swizzles | |||
| 2009-09-24 | r600: fix point sizes | Alex Deucher | |
| registers takes radius | |||
| 2009-09-24 | r600: fix polygon offset | Alex Deucher | |
| 2009-09-24 | radeon: don't build non-r600 span code on r600 | Alex Deucher | |
| 2009-09-24 | r600: minor span cleanups | Alex Deucher | |
| 2009-09-24 | r600: support position_invariant programs | Andre Maasikas | |
| 2009-09-24 | r600: add span support for 1D tiles | Alex Deucher | |
| 1D tile span support for depth/stencil/color/textures Z and stencil buffers are always tiled, so this fixes sw access to Z and stencil buffers. color and textures are currently linear, but this adds span support when we implement 1D tiling. This fixes the text in progs/demos/engine and progs/tests/z* | |||
| 2009-09-24 | r600: fix warning | Alex Deucher | |
| Noticed by rnoland on IRC. | |||
| 2009-09-24 | r600: fix texcoords from constants | Andre Maasikas | |
| with some minor updates from Richard. | |||
| 2009-09-24 | r600: enable caching of vertex programs | Andre Maasikas | |
| 2009-09-24 | r600: check if textures are actually enabled before submission | Alex Deucher | |
| noticed by taiu on IRC. | |||
| 2009-09-24 | r600: fix ftp for dri1 | Alex Deucher | |
| We use t->bo for dri1 since r600 uses CS for dri1. | |||
| 2009-09-24 | r600: don't setup hardware state if TFP | Dave Airlie | |
| if we have a BO here it means TFP and we should have set it up already. tested by b0le on #radeon | |||
| 2009-09-24 | r600: fix dri2 clipping | Alex Deucher | |
| 2009-09-23 | r600: fix up ordering of functions in draw prims path | Alex Deucher | |
| Shaders and IB need to be updated and allocated before calling validatebuffers. | |||
| 2009-09-23 | r300: fallback to software rendering if we are out of free texcoords | Maciej Cencora | |
| Fixes #22741 | |||
| 2009-09-23 | r600: fix r700PredictRenderSize for draw prims path | Alex Deucher | |
| 2009-09-23 | r600 : add hw index buffer draw support. | Richard Li | |
| 2009-09-23 | Finish removing glcore | Adam Jackson | |
| 2009-09-23 | r600: fix copy/paste typo | Alex Deucher | |
| 2009-09-23 | r600: fix some warnings | Alex Deucher | |
| 2009-09-23 | r600: add support for CUBE textures, also TXP | Andre Maasikas | |
| seems to work here ... | |||
| 2009-09-22 | Merge branch 'mesa_7_6_branch' | Brian Paul | |
| 2009-09-22 | r600 : add draw_prim support, make up one lost change. | Richard Li | |
| 2009-09-22 | r600 : add draw_prim support. | Richard Li | |
| 2009-09-22 | r300: Fix crash reported in bug #24066 | Nicolai Hähnle | |
| Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com> | |||
| 2009-09-21 | radeon: update buffer map/unmap code for changes introduced in ↵ | Maciej Cencora | |
| 92033a9516942d7272ce4bf36ecd422009bbaf60 and 822c7964819ca1fcc270880d4ca8b3de8a4276d0 | |||
| 2009-09-21 | r300: fix a typo | Maciej Cencora | |
| 2009-09-21 | r600: fix typo in the last commit | Alex Deucher | |
| 128 gprs, 256 reg-based consts | |||
| 2009-09-21 | r600: various cleanups | Alex Deucher | |
| - max texture size is 8k, but mesa doesn't support that at the moment. - attempt to set shader limits to what the hw actually supports - clean up some old r300 cruft - no need to explicitly disable irqs. This is fixed in the drm now. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> | |||
| 2009-09-21 | radeon: update buffer map/unmap code for changes introduced in ↵ | Maciej Cencora | |
| 92033a9516942d7272ce4bf36ecd422009bbaf60 and 822c7964819ca1fcc270880d4ca8b3de8a4276d0 | |||
| 2009-09-21 | r300: fix a typo | Maciej Cencora | |
| 2009-09-21 | r600: fix some issues with LIT instruction | Andre Maasikas | |
| - MUL_LIT is ALU.Trans instruction - some Trans instructions can take 3 arguments - don't clobber dst.x, use dst.z as temp, it'll get written correct value in last insn - respect source swizzles | |||
| 2009-09-21 | Merge branch 'mesa_7_6_branch' | Nicolai Hähnle | |
| 2009-09-21 | r300: Zero-initialize register for NV_vertex_program | Nicolai Hähnle | |
| Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com> | |||
| 2009-09-21 | r300: Fix handling of NV_vertex_program parameters | Nicolai Hähnle | |
| The handling is a bit inefficient, unfortunately, but I don't want to make any intrusive changes for Mesa 7.6. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com> | |||
| 2009-09-21 | Merge branch 'mesa_7_6_branch' | Michel Dänzer | |
| 2009-09-21 | Merge branch 'mesa_7_5_branch' into mesa_7_6_branch | Michel Dänzer | |
| 2009-09-21 | intel: Fix crash in intel_flush(). | Michel Dänzer | |
| Since commit 2921a2555d0a76fa649b23c31e3264bbc78b2ff5 ('intel: Deassociated drawables from private context struct in intelUnbindContext'), intel->driDrawable may be NULL in intel_flush(). | |||
| 2009-09-20 | dri/swrast: call _mesa_meta_init/free() | Brian Paul | |
| 2009-09-20 | Revert "mesa: move _mesa_meta_init/free() calls to core Mesa" | Brian Paul | |
| This reverts commit 651cffd626a82d9bf539437ca4bdf8ea4b396fab. The commit inadvertantly introduced a new gallium dependency on the meta code. | |||
| 2009-09-20 | intel: meta clear has a new name. | Chia-I Wu | |
| It was renamed to _mesa_meta_Clear. Signed-off-by: Chia-I Wu <olvaffe@gmail.com> | |||
| 2009-09-20 | radeon: Fix legacy bo not to reuse dma buffers before refcount is 1. | Pauli Nieminen | |
| This should help detecting possible memory leaks with dma buffers and prevent possible visual corruption if data would be overwriten too early. | |||
| 2009-09-20 | r300/compiler: Fix trig instructions in R300 fp | Nicolai Hähnle | |
| Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com> | |||
| 2009-09-20 | radeon: Fix typo in variable name. | Pauli Nieminen | |
| 2009-09-20 | radeon: Improve WARN_ONCE macro to appear as single statement. | Pauli Nieminen | |
| Do-while makes macro safe to be used with if and for constructions. Also remove __LINE__ macro from variable name because scope is local to macro anyway. | |||
| 2009-09-20 | radeon: Fix "verts" debugging enable | Nicolai Hähnle | |
| Copy'n'paste apparently prevented the RADEON_VERTS flag from being enabled. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com> | |||
| 2009-09-20 | Merge branch 'mesa_7_6_branch' | Brian Paul | |
| Conflicts: src/mesa/drivers/dri/intel/intel_clear.c | |||
| 2009-09-20 | r300/compiler: Fix R300 fragment program regression introduced by 0723cd1... | Nicolai Hähnle | |
| We obviously need to move the code addr register backwards because their may be overlap. This bug affected in particular the Compiz water plugin. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com> | |||
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index : android-x86-mesa.git | |
| Androïd/x86 port of Mesa drivers | Hugues Hiegel |
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