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path: root/src/mesa/drivers/dri
AgeCommit message (Collapse)Author
2007-05-18Allow unreference with a NULL argument.Eric Anholt
2007-05-18Fix double-counting of low_offset in block->virtual.Eric Anholt
2007-05-18Zero out bufmgr_fake on alloc.Eric Anholt
2007-05-18Dead code elimination and fix bufmgr_fake_wait_idle.Eric Anholt
2007-05-18Kill old struct bufmgr members.Eric Anholt
2007-05-18Fix some use-before-initialize in bufmgr_fake.Eric Anholt
2007-05-18Ratchet required version down to 1.5 (pre-TTM).Eric Anholt
2007-05-17Restore missing intel_batchbuffer_reset() which was needed.Eric Anholt
2007-05-17Rename the i915tex_dri.so driver to just i915_dri.so again.Eric Anholt
2007-05-17Convert i915tex to the new interface and make it compile.Eric Anholt
2007-05-16WIP: Replace TTM buffer pool manager with a simplified interface.Eric Anholt
The interface is not solid yet (some simplification to do still, and adjustment for 0-copy), and the drivers are not converted. However, the new interface allows using the same calls to support either a TTM or a classic static allocation backend, with the static backend allowing a more limited feature set.
2007-04-10rs480: set vap cntl to what fglrx uses for non-TCL cardsDave Airlie
2007-04-10i915: Bring test for vsync to pipe B in line with i915tex.Michel Dänzer
2007-04-10r300: don't enable VAP/TCL on cards that don't support itDave Airlie
2007-04-09i915tex: Fix some mismatches between texels or bytes for pitch/stride.Michel Dänzer
2007-04-09i915tex: Make sure texture format fetch hooks are initialized.Michel Dänzer
2007-04-09the RS400 definitely doesn't work at this point so don't let it initDave Airlie
2007-04-08i915tex: Clean up resizing of renderbuffers.Michel Dänzer
2007-04-08driUpdateFramebufferSize: Use ctx->Driver.ResizeBuffers.Michel Dänzer
2007-04-05include points.h to fix warningsBrian
2007-04-05Remove SI imports/exports remnants.George Sapountzis
2007-04-05Move glcontextmodes.c to glx.George Sapountzis
It is no longer linked with DRI drivers, libGL passes function pointers through the DRI interface.
2007-04-04i810/i915/i915tex: reinitialize the context point stateXiang, Haihao
2007-03-30Merge branch 'origin'Eric Anholt
2007-03-30Merge branch 'crestline-qa', adding support for the 965GM chipset.Eric Anholt
2007-03-30call DRI_VALIDATE_DRAWABLE_INFO(), bug 10477Gustavo Pichorim Boiko
2007-03-27i915tex compile fix (account for moved _UseTexEnvProgram var)Roland Scheidegger
2007-03-27Restore the UseTexEnvProgram logic.Brian
Was removed during glsl-compiler work. Still need to go back and revisit this because of the interaction with fragment shaders...
2007-03-27r300: Fix radeonUpdatePageFlipping() function.Roland Scheidegger
Always call driFlipRenderbuffers() with pfCurrentPage value, in case it's initially 1 instead of 0. May fix some issues with pageflip, the same fix was applied to r128, radeon and r200 (6e0e6eff05727ac8833c2b2dffc51c6619427e77).
2007-03-27r128, radeon, r200: Check ctx->WinSysDrawBuffer before calling function that ↵Roland Scheidegger
dereferences it. Same fix as for r300 (which fixed https://bugs.freedesktop.org/show_bug.cgi?id=10417), since it's likely an issue with those drivers too.
2007-03-27r300: Check ctx->WinSysDrawBuffer before calling function that dereferences it.Michel Dänzer
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=10417 .
2007-03-26fix r128 rendering, lockupsMiroslav Šustek
mis-count in offset led to mis-rendering and lockups; units are 4 bytes rather than 1. Noticed by Chris Salch. fixes bug 7994, possibly others.
2007-03-27 Fix compile errorZou Nan hai
2007-03-26r300: Remove a warning when vertex programs produce an unused outputNicolai Haehnle
As far as we know, the hardware prefers outputs packed tightly together with no holes caused by outputs that are not even read by the fragment program. Therefore, we slightly rewrite vertex programs in this case. It would be interesting to test this interaction between vertex programs and fragment programs further, because some of that rewrite may be unnecessary. However, play it safe for now and don't change the current behaviour.
2007-03-26r300: Whitespace cleanup (remove trailing spaces)Nicolai Haehnle
2007-03-26r300: Fix warnings that were introduced by the glsl mergeNicolai Haehnle
2007-03-26merge of glsl-compiler-1 branchBrian
2007-03-26i915tex: Make sure renderbuffers don't get deleted when flipping them.Michel Dänzer
Since the recent renderbuffer refcounting fixes it's no longer sufficient to just remove the old renderbuffer from the framebuffer and then add the new one because the former may decrease the reference count to 0 and delete the old renderbuffer.
2007-03-26nouveau: match drm version bumpBen Skeggs
2007-03-26Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestlineNian Wu
2007-03-25i965: The given urb layout(maximal size of urb entries and theXiang, Haihao
values for nr of entries) should meet the requirement.
2007-03-25r300: Whitespace cleanup in r300_texmem.cNicolai Haehnle
2007-03-25r300: Whitespace cleanup in r300_texstate.cNicolai Haehnle
2007-03-25r300: Fix regression: unnecessary node indirectionNicolai Haehnle
The texture_rectangle fix introduced a bug where every texture instruction caused a new indirection.
2007-03-25Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestlineNian Wu
2007-03-25nouveau: implement nv20Clear and nv20ScissorDave Airlie
Still crashes out on scissor regs
2007-03-24r300: Fix texture coordinate calculation for rectangle texturesNicolai Haehnle
R300 hardware takes texcoords in the range 0..1 even for rectangle textures. Previously, the necessary texcoord conversion was applied to the texture coordinate during vertex processing in a render stage. This is obviously wrong when fragment programs are used, which can calculate arbitrary coordinates for TEX instructions. Therefore, we now inject an appropriate MUL instruction before a TEX that reference a rectangle texture.
2007-03-24r300: No assertion when accessing incomplete texture images.Nicolai Haehnle
There used to be an assertion when a fragment program accesses an incomplete texture image. Work around this assertion. Note: I am unsure whether this workaround produces the desired result (0,0,0,1) on all hardware.
2007-03-24r300: Fix: KIL instruction don't require texturesNicolai Haehnle
When no textures were enabled, a KIL instruction triggered an assertion in r300_setup_rs_unit.
2007-03-24nouveau: some swtcl fixesBen Skeggs