Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-06-03 | [intel] Convert drivers to using libdrm bufmgr code. | Eric Anholt | |
2008-05-30 | [intel-gem] Remember last offset of reused BOs to avoid more kernel relocs. | Eric Anholt | |
This is good for about 5% on ipers on 965, and should help any cpu-bound app. | |||
2008-05-28 | [intel-gem] Once mapped, leave buffers mapped. | Keith Packard | |
Mapping and unmapping buffers is expensive, and having the map around isn't harmful (other than consuming address space). So, once mapped, just leave buffers mapped in case they get re-used. | |||
2008-05-26 | [intel] all flushing in intelEmitCopyBlit | Keith Packard | |
Add both MI_FLUSH and intel_batchbuffer_flush to intelEmitCopyBlit. This ensures that the data are flushed *and* the gem kernel driver sees the various memory domain transitions. | |||
2008-05-25 | [intel] Enable buffer re-use for gem | Keith Packard | |
Use the new DRM_IOCTL_I915_GEM_BUSY ioctl to detect idle buffers for re-use. | |||
2008-05-23 | Remove stale comment about glFlush(). | Eric Anholt | |
We don't need an MI_FLUSH there, because everything that's been flushed in the batch will eventually hit the hardware. | |||
2008-05-23 | Emit a flush after the swapbuffers blit, so contents end up on the screen. | Eric Anholt | |
Otherwise, since the MI_FLUSH at the end of every batch had been removed, non-automatic-flushing chips (965) wouldn't get flushed and apps with static rendering would get partial screen contents until the server's blockhandler flush kicked in. | |||
2008-05-22 | Add back a mostly-correct glFinish for GEM and fake. | Eric Anholt | |
The right solution would probably be keeping a list of regions which have been rendered to. | |||
2008-05-22 | [intel-gem] Make sure set_domain is called often enough. | Keith Packard | |
The write_domain needs to be set after any batch buffer uses an object, track when that happens in the new 'cpu_domain_set' field. | |||
2008-05-17 | [intel-gem] Don't calloc reloc buffers | Keith Packard | |
Only a few relocations are typically used, so don't clear the whole thing. | |||
2008-05-13 | [GEM] Actually include the presumed offset in initial relocations. | Eric Anholt | |
This avoids kernel relocations for most batchbuffer relocs. | |||
2008-05-11 | [intel] update GEM api. Add bo_subdata and bo_get_subdata driver hooks. | Keith Packard | |
Track DRM GEM name changes. Add driver hooks for bo_subdata and bo_get_subdata so that GEM can use pread and pwrite. | |||
2008-05-08 | [intel-gem] move domains to relocations. add set_domain to bo_map. | Keith Packard | |
Fix the kernel API to place the read/write domain information in the relocation instead of the buffer. | |||
2008-05-08 | [intel] intel_batchbuffer_flush using uninit 'used' to check for buffer empty | Keith Packard | |
Make sure 'used' tracks the right value through the whole function. Also, use GLint for intel_batchbuffer_space in case we do bad things in the future. | |||
2008-05-07 | GEM: Remove already-disabled PIPE_CONTROL command. | Eric Anholt | |
This existed to get the icache flushed. However, GEM handles this for us now for sure, and we had disabled it prematurely anyway. | |||
2008-05-07 | GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags. | Eric Anholt | |
The GEM flags are much more descriptive for what we need. Since this makes bufmgr_fake rather device-specific, move it to the intel common directory. We've wanted to do device-specific stuff to it before. | |||
2008-05-07 | GEM: Don't emit an extra MI_FLUSH in the batch since GEM handles it. | Eric Anholt | |
2008-05-06 | [intel-GEM] partial support for memory domains. | Keith Packard | |
Doesn't deal with local modifications yet (need new kernel set_domain ioctl for that to work). Also, guesses what domains are affected based on the read/write bits set in the flags. Works for 915, probably not so much for 965. | |||
2008-05-06 | [intel-GEM] Add tiling support to swrast. | Keith Packard | |
Accessing tiled surfaces without using the fence registers requires that software deal with the address swizzling itself. | |||
2008-05-05 | Dump buffer tiled status from intelPrintSAREA | Keith Packard | |
2008-05-05 | GEM: Allocate the right number of relocs, avoiding heap smashing. | Eric Anholt | |
2008-05-05 | GEM: Include target buffer handle in relocation debug. | Eric Anholt | |
2008-05-05 | GEM: Set validate index to keep the same buffer from being duped on the list. | Eric Anholt | |
2008-05-05 | Print GEM handles instead of BO pointers in debugging. | Eric Anholt | |
small integers are much prettier, and let me correlate to DRM debug output. | |||
2008-05-05 | Initialize bufmgr_gem->validate_array[i].offset. | Eric Anholt | |
This is just cosmetic, to produce less scary values when the ioctl fails and doesn't return values there. | |||
2008-05-05 | Make intel_{batch,exec}_ioctl return an error code so we can recover better. | Eric Anholt | |
2008-05-05 | Add intel_bufmgr_gem.c to i915 | Keith Packard | |
2008-05-05 | Temporarily disable intel pixel ops on i915 for GEM | Keith Packard | |
Instead of attempting to fix these for GEM, just disable until GEM is working. | |||
2008-05-02 | Don't forget to set handle of shared buffers. | Eric Anholt | |
(And fix a nearby whitespace nit) | |||
2008-05-02 | Fix GEM execbuf ioctl argument. | Eric Anholt | |
2008-05-02 | Fix to use GEM execbuf instead of TTM. | Eric Anholt | |
2008-05-02 | Minor fixups to get GEM to the point of execbuf ioctl. | Eric Anholt | |
2008-05-02 | [intel] Fix build for GEM. TTM is now disabled, and fencing is gone. | Eric Anholt | |
Fencing was used in two places: ensuring that we didn't get too many frames ahead of ourselves, and glFinish. glFinish will be satisfied by waiting on buffers like we would do for CPU access on them. The "don't get too far ahead" is now the responsibility of the execution manager (kernel). | |||
2008-05-02 | Add intel_bufmgr_gem for new graphics execution manager. | Eric Anholt | |
2008-05-02 | [intel] Warnings fixes. | Eric Anholt | |
2008-05-02 | [intel] Merge intel_ioctl.h. Not sure how this slipped by in the .c merge. | Eric Anholt | |
2008-04-30 | intel: test cpp to ensure mipmap tree matches texture image. | Xiang, Haihao | |
2008-04-29 | r200: fix state submission issue causing bogus textures (bug 15730) | Ove Kaaven | |
2008-04-29 | Change default of driconf "allow_large_textures" to announce hardware limits. | Michel Dänzer | |
The previous default these days served mostly to cause artifical problems with GLX compositing managers like compiz (see e.g. http://bugs.freedesktop.org/show_bug.cgi?id=10501). | |||
2008-04-28 | build fix for xorg driver | Alan Hourihane | |
2008-04-25 | [i965] short immediate values must be replicated to both halves of the dword | Keith Packard | |
The 32-bit immediate value in the i965 instruction word must contain two copies of any 16-bit constants. brw_imm_uw and brw_imm_w just needed to copy the value into both halves of the immediate value instruction field. | |||
2008-04-25 | silence warning | Alan Hourihane | |
2008-04-24 | enable GL_EXT_multi_draw_arrays (see bug 15670) | Pierre Beyssac | |
2008-04-22 | i965: fix DEPTH_TEXTURE_MODE (bug #14220) | Xiang, Haihao | |
2008-04-22 | [i965] This is to fix random crash in some maps of Ut2004 demo. | Zou Nan hai | |
e.g. bridge of fate. If vs output is big, driver may fall back to use 8 urb entries for vs, unfortunally, for some unknown reason, if vs is working at 4x2 mode, 8 entries is not enough, may lead to gpu hang. | |||
2008-04-22 | i965: save the offset of target buffer after last execution, not relocatee ↵ | Xiang, Haihao | |
buffer. | |||
2008-04-21 | intel: fix an assertion failure. fix bug #15575 | Xiang, Haihao | |
2008-04-21 | i965: clear the PRESUMED_OFFSET flag from bo_req.hint, not bo_req.flags. fix ↵ | Xiang, Haihao | |
#15574 | |||
2008-04-18 | i965: fixup depth buffer check | Dave Airlie | |
2008-04-18 | i965: fix vb aperture space check | Dave Airlie | |