| Age | Commit message (Expand) | Author |
|---|
| 2009-03-02 | mesa: use Stencil._Enabled field instead of Stencil.Enabled | Brian Paul |
| 2009-03-02 | mesa: remove unused AUX buffers | Brian Paul |
| 2009-02-28 | mesa: rename, reorder FRAG_RESULT_x tokens | Brian Paul |
| 2009-02-27 | intel: remove some unneeded buffer unmap calls | Brian Paul |
| 2009-02-27 | i915: Add support for a new G33-like chipset. | Shaohua Li |
| 2009-02-27 | i965: texture fixes: bordered textures, fallback rendering | Robert Ellison |
| 2009-02-26 | intel: no-op the intel_finish_render_texture() function | Brian Paul |
| 2009-02-26 | intel: check texture formats in intel_validate_framebuffer() | Brian Paul |
| 2009-02-26 | intel: updated comment, some debug code (disabled) | Brian Paul |
| 2009-02-26 | i965: rename draw_regions -> color_regions | root |
| 2009-02-26 | i965: add missing init for region->width | Brian Paul |
| 2009-02-26 | mesa: replace old prog_instruction::Sampler field with Aux field | Brian Paul |
| 2009-02-26 | i965: whitespace/indentation fixes | Brian Paul |
| 2009-02-26 | intel: Revert disable of accelerated Bitmap, which slipped in with spans stuff. | Eric Anholt |
| 2009-02-26 | i965: fix for RHW workaround | Xiang, Haihao |
| 2009-02-26 | intel: Disable creating DRI2 FBconfigs with depth size != color size. | Eric Anholt |
| 2009-02-26 | intel: Add span code for z24 without stencil. | Eric Anholt |
| 2009-02-25 | intel: make template wrappers for the spans templates. | Eric Anholt |
| 2009-02-25 | intel: Fix up x8r8g8b8 renderbuffer format so that alpha=1 spans code happens. | Eric Anholt |
| 2009-02-25 | i965: Rename CMD_CONST_BUFFER_STATE to the CS_URB_STATE used in the docs. | Eric Anholt |
| 2009-02-25 | R300: Add support for RS600 chips | Alex Deucher |
| 2009-02-23 | i965: fix line stipple fallback for GL_LINE_STRIP primitives | Robert Ellison |
| 2009-02-22 | texmem: fix typo from brianp's changes. | Dave Airlie |
| 2009-02-21 | mesa: use an array for current texture objects | Brian Paul |
| 2009-02-21 | mesa: re-org texgen state | Brian Paul |
| 2009-02-21 | intel: Fix intelSetTexBuffer miptree leak. | Kristian Høgsberg |
| 2009-02-21 | intel: tell libdrm whether we want a cpu-ready or gpu-ready BO for regions. | Eric Anholt |
| 2009-02-21 | i965: Fix render target read domains. | Eric Anholt |
| 2009-02-20 | i965: use the new prog_instruction::TexShadow field | Brian Paul |
| 2009-02-20 | i965: check depth_mode in translate_tex_format() for MESA_FORMAT_S8_Z24 | Brian Paul |
| 2009-02-20 | i965: separate emit_op() and emit_tex_op() functions | Brian Paul |
| 2009-02-20 | i965: update comment, use const qualifier | Brian Paul |
| 2009-02-20 | i965: var renaming, clean-up | Brian Paul |
| 2009-02-20 | i965: added comment | Brian Paul |
| 2009-02-20 | intel: fix datatype typo, s/GLboolean/GLuint/ | Brian Paul |
| 2009-02-20 | i965: additional debug output | Brian Paul |
| 2009-02-17 | intel: Fix tri clear to do FBO color attachments as well. | Eric Anholt |
| 2009-02-17 | i965: Fix fallback on stencil drawing to fbo when the visual lacks stencil. | Eric Anholt |
| 2009-02-17 | intel: Clean up several 965 memory leaks on context destroy. | Eric Anholt |
| 2009-02-16 | i965: tell GLSL compiler to emit code using condition codes | Brian Paul |
| 2009-02-14 | r300: Redirect constant TEX coordinates | Nicolai Haehnle |
| 2009-02-13 | i965: rewrite the code for handling shader subroutine calls | Brian Paul |
| 2009-02-13 | i965: add missing break for OPCODE_RET case | Brian Paul |
| 2009-02-13 | i965: the return value of translate_insn() is never used. Make it void. | Brian Paul |
| 2009-02-13 | i965: minor clean-ups | Brian Paul |
| 2009-02-13 | i965: code clean-ups, comments, and minor refactoring | Brian Paul |
| 2009-02-13 | i965: updated comments | Brian Paul |
| 2009-02-13 | intel: turn on GL_ARB_shading_language_120 | Brian Paul |
| 2009-02-13 | i965: more reformatting/clean-up | Brian Paul |
| 2009-02-13 | i965: s/__inline/INLINE/ | Brian Paul |
