Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-09-09 | r600: don't setup hardware state if TFP | Dave Airlie | |
if we have a BO here it means TFP and we should have set it up already. tested by b0le on #radeon | |||
2009-09-08 | intel: Add support for ARB_draw_elements_base_vertex. | Eric Anholt | |
On the 965, we just drop the value into the primitive packet. On non-945, we rely on the sw tnl code handling it. | |||
2009-09-08 | mesa: Add support for ARB_draw_elements_base_vertex. | Eric Anholt | |
2009-09-08 | glapi: Add ARB_draw_elements_base_vertex | Eric Anholt | |
2009-09-08 | mesa: Expose NV_depth_clamp if ARB_depth_clamp is supported. | Eric Anholt | |
The wording of these two is exactly the same, except for the issue "Can fragments with wc<=0 be generated when this extension is supported?", which idr thinks is a non-issue for us. | |||
2009-09-08 | i965: Add support for ARB_depth_clamp. | Eric Anholt | |
2009-09-08 | mesa: Add support for ARB_depth_clamp. | Eric Anholt | |
This currently doesn't include fixing up the cliptests in the assembly paths to support ARB_depth_clamp, so enabling depth_clamp forces the C path. | |||
2009-09-08 | i965: Respect spec requirement for pixel shader computed depth with no zbuffer. | Eric Anholt | |
2009-09-08 | i965: Set NULL WM surfaces as tiled according to requirement by specs. | Eric Anholt | |
2009-09-08 | i965: Use the renderbuffer surface size instead of region size for WM surfaces. | Eric Anholt | |
For drawing to lower mipmap levels, the region size makes the renderbuffer be the size of the lowest level, instead of the current level. On DRI1, Brian previously found that the RB size was incorrect, so leave this broken there. | |||
2009-09-08 | Revert "intel: helper to debug bufmgr (disabled)" | Eric Anholt | |
This reverts commit e0ec405a9fa6fbc1cf2ac531ed5efd1a64e01f18. This is already available in INTEL_DEBUG=bufmgr in the environment. | |||
2009-09-08 | i965: #include clean-ups | Brian Paul | |
2009-09-08 | intel: #include clean-ups | Brian Paul | |
2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
Also, remove unneeded call to _mesa_validate_pbo_access(). It's done by core Mesa as the comment suggested. | |||
2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
2009-09-08 | r600: fix dri2 clipping | Alex Deucher | |
2009-09-04 | r600: add support for EXT_texture_sRGB | Alex Deucher | |
2009-09-04 | r300: Add support for GL_EXT_provoking_vertex | Alex Deucher | |
2009-09-04 | r600: Add support for GL_EXT_provoking_vertex | Alex Deucher | |
2009-09-04 | i965: Don't set the complete field when there is more VUE yet to come. | Eric Anholt | |
This should help with things like lightsmark, but I don't have a testcase for this commit. | |||
2009-09-04 | i965: Add support for 2 threads in the GS. | Eric Anholt | |
This brings noop vertex shader throughput from 6.8M verts/sec to 10.4M verts/sec using GL_QUADs on my GM45. | |||
2009-09-04 | i965: Add support for KIL_NV in brw_wm_emit.c | Eric Anholt | |
I ran into this lack of support when writing a shader that always discarded the fragments. | |||
2009-09-04 | r600: fix Elts handling | Alex Deucher | |
Patch from taiu on IRC. fixes bug 23585 | |||
2009-09-03 | r600: rework cb/db setup | Alex Deucher | |
Setup the regs when we emit rather than during state setup. In certain cases a proper CB target was never emitted. This fixes bug 23658. | |||
2009-09-03 | r600: make sure the active vertex shader bo is re-added to persistent list. | Alex Deucher | |
2009-09-03 | mesa: rename gl_sync_object::Status to StatusFlag | Brian Paul | |
There's a symbol collision with X11/Xlib.h #define Status int in the Mesa xlib code. This seems the simpliest way to work around this. | |||
2009-09-03 | savage: Fix driver build post-ARB_sync. | Eric Anholt | |
Like s3v, clean up absurd use of Xlib in the driver, avoiding namespace pollution. | |||
2009-09-03 | s3v: Fix driver build for ARB_sync. | Eric Anholt | |
This driver was including Xlibint.h to get the CARD32 typedef to use for 32-bit unsigned integers, which #defined Status to something. CARD32 isn't actually a 32-bit unsigned integer, so replacing with uint32_t usage should fix bugs on 64-bit along with the build. | |||
2009-09-03 | intel: Add support for ARB_sync. | Eric Anholt | |
We currently weasel out of supporting the timeout parameter, but otherwise this extension looks ready, and should make the common case happy. | |||
2009-09-03 | ARB sync / swrast: Use GL_ARB_sync_functions instead of GL_ARB_sync. Oops. | Ian Romanick | |
2009-09-03 | ARB sync: Add support for GL_ARB_sync to swrast | Ian Romanick | |
This isn't quite right yet. The delete behavior and the context clean-up needs some work. | |||
2009-09-03 | Eliminate trailing whitespace in extension_helper.c | Ian Romanick | |
2009-09-03 | ARB sync: Regenerate files from previous commit | Ian Romanick | |
2009-09-03 | intel: helper to debug bufmgr (disabled) | Brian Paul | |
2009-09-03 | mesa: change ctx->Driver.BufferData() to return GLboolean for success/failure | Brian Paul | |
Return GL_FALSE if we failed to allocate the buffer. Then raise GL_OUT_OF_MEMORY in core Mesa. | |||
2009-09-03 | r600: visual depth has no meaning here. | Dave Airlie | |
fbos get angry when this happens. | |||
2009-09-03 | r600: make sure the active shader bo is re-added to persistent list. | Dave Airlie | |
2009-09-03 | radeon: pass internal format into the miptree. | Dave Airlie | |
We need to figure out if the compression format changes. without this texcmp segfaults if you change format enough times. | |||
2009-09-03 | radeon/dri2: add gl20 bits for r300/r600 just like dri1 does | Dave Airlie | |
2009-09-02 | Revert "i965: Use VBOs in the VBO module on 965, now that we have ↵ | Eric Anholt | |
ARB_map_buffer_range." This reverts commit 00413d87426f14df47d90ba3c995e1889e9f88ca. Even with fixes, using ARB_map_buffer_range in the VBO module isn't showing up as a significant win, and some cases apparently regressed. Bug #23624. | |||
2009-09-02 | intel: Add support for FlushMappedBufferRange for ARB_map_buffer_range. | Eric Anholt | |
This should help for the usage by the VBO module, where we would upload the whole remaining chunk of the buffer for a series of range maps that should cover just a segment of it. | |||
2009-09-02 | intel: Sync a synchronized READ_BIT map buffer range with GL drawing to it. | Eric Anholt | |
It's probably uncommon, but would obviously have gone wrong. | |||
2009-09-02 | intel: Move MapBufferRange mesa state setting up to cover the 915 case. | Eric Anholt | |
2009-09-02 | i965: CS FENCE in URB_FENCE is 11-bits wide | Xiang, Haihao | |
2009-09-02 | i965: validate sf state | Xiang, Haihao | |
2009-09-01 | intel: use _mesa_expand_bitmap() to skip an intermediate buffer | Brian Paul | |
2009-09-01 | dri: remove unused meta_clear_tris() | Brian Paul | |
2009-09-01 | intel: use BUFFER_BITS_COLOR | Brian Paul | |