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path: root/src/mesa/drivers/dri
AgeCommit message (Collapse)Author
2009-09-28Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul
2009-09-25intel: Handle GL_RGB8 for glCopyTex(Sub)Image.Michel Dänzer
Avoids an unnecessary fallback.
2009-09-24i915: Fix GetBufferSubData in the case of a system-memory BO.Eric Anholt
Bug #23760 (crashes in wine)
2009-09-24intel: Flush the batch when we're about to subdata into a VBO.Eric Anholt
This fixes the clears in openarena with the new metaops clear code, and the new piglit vbo-subdata-sync test. Bug #23857.
2009-09-24i965: Clean up some mess with the batch cache.Eric Anholt
Its flagging of extra state that's already flagged by the vtbl new_batch when appropriate was confusing my tracking down of the OA clear bug.
2009-09-24i965: Emit zero initialization for NV VP temporaries as required.Eric Anholt
This is similar to what r300 does inside the driver, but I've added it as a generic option since it seems most hardware will want it. Fixes piglit nv-init-zero-reg.vpfp and nv-init-zero-addr.vpfp.
2009-09-24i965: Remove assert about NV_vp now that it somewhat works.Eric Anholt
2009-09-24i965: Load NV program matrices when required.Eric Anholt
2009-09-24intel: use default array/element buffers in intel_generate_mipmap()Brian Paul
If there happened to be a bound VBO when intel_generate_mipmap() was called we blew up because of a bad vertex array pointer. Fixes regnumonline, bug 23859.
2009-09-24radeon: Fix scissors for r600 KMS.Pauli Nieminen
Radeon generic scissors code had problem that some of code was using exclusive and some inclusive bottom right corner. Only r600 driver is using exclusive coordinate so changed generic code to pass inclusive coordinate and r600 driver changes BR coordinate to be exclusive.
2009-09-24r600: add support for CUBE textures, also TXPAndre Maasikas
seems to work here ...
2009-09-24r600: fix typo in the last commitAlex Deucher
128 gprs, 256 reg-based consts
2009-09-24r600: various cleanupsAlex Deucher
- max texture size is 8k, but mesa doesn't support that at the moment. - attempt to set shader limits to what the hw actually supports - clean up some old r300 cruft - no need to explicitly disable irqs. This is fixed in the drm now. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-09-24r600: fix some issues with LIT instructionAndre Maasikas
- MUL_LIT is ALU.Trans instruction - some Trans instructions can take 3 arguments - don't clobber dst.x, use dst.z as temp, it'll get written correct value in last insn - respect source swizzles
2009-09-24r600: fix point sizesAlex Deucher
registers takes radius
2009-09-24r600: fix polygon offsetAlex Deucher
2009-09-24radeon: don't build non-r600 span code on r600Alex Deucher
2009-09-24r600: minor span cleanupsAlex Deucher
2009-09-24r600: support position_invariant programsAndre Maasikas
2009-09-24r600: add span support for 1D tilesAlex Deucher
1D tile span support for depth/stencil/color/textures Z and stencil buffers are always tiled, so this fixes sw access to Z and stencil buffers. color and textures are currently linear, but this adds span support when we implement 1D tiling. This fixes the text in progs/demos/engine and progs/tests/z*
2009-09-24r600: fix warningAlex Deucher
Noticed by rnoland on IRC.
2009-09-24r600: fix texcoords from constantsAndre Maasikas
with some minor updates from Richard.
2009-09-24r600: enable caching of vertex programsAndre Maasikas
2009-09-24r600: check if textures are actually enabled before submissionAlex Deucher
noticed by taiu on IRC.
2009-09-24r600: fix ftp for dri1Alex Deucher
We use t->bo for dri1 since r600 uses CS for dri1.
2009-09-24r600: don't setup hardware state if TFPDave Airlie
if we have a BO here it means TFP and we should have set it up already. tested by b0le on #radeon
2009-09-24r600: fix dri2 clippingAlex Deucher
2009-09-23r300: fallback to software rendering if we are out of free texcoordsMaciej Cencora
Fixes #22741
2009-09-22r300: Fix crash reported in bug #24066Nicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-21radeon: update buffer map/unmap code for changes introduced in ↵Maciej Cencora
92033a9516942d7272ce4bf36ecd422009bbaf60 and 822c7964819ca1fcc270880d4ca8b3de8a4276d0
2009-09-21r300: fix a typoMaciej Cencora
2009-09-21intel: Mark the FBO as incomplete if there's no intel_renderbuffer for it.Eric Anholt
This happens to rendering with textures with a border, which had resulted in a segfault on dereferencing the irb. (cherry-picked from commit 8bba183b9eeb162661a287bf2e118c6dd419dd24)
2009-09-21r300: Zero-initialize register for NV_vertex_programNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-21r300: Fix handling of NV_vertex_program parametersNicolai Hähnle
The handling is a bit inefficient, unfortunately, but I don't want to make any intrusive changes for Mesa 7.6. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-21Merge branch 'mesa_7_5_branch' into mesa_7_6_branchMichel Dänzer
2009-09-21intel: Fix crash in intel_flush().Michel Dänzer
Since commit 2921a2555d0a76fa649b23c31e3264bbc78b2ff5 ('intel: Deassociated drawables from private context struct in intelUnbindContext'), intel->driDrawable may be NULL in intel_flush().
2009-09-20radeon: Fix legacy bo not to reuse dma buffers before refcount is 1.Pauli Nieminen
This should help detecting possible memory leaks with dma buffers and prevent possible visual corruption if data would be overwriten too early.
2009-09-20r300/compiler: Fix trig instructions in R300 fpNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-20radeon: Fix typo in variable name.Pauli Nieminen
2009-09-20radeon: Improve WARN_ONCE macro to appear as single statement.Pauli Nieminen
Do-while makes macro safe to be used with if and for constructions. Also remove __LINE__ macro from variable name because scope is local to macro anyway.
2009-09-20radeon: Fix "verts" debugging enableNicolai Hähnle
Copy'n'paste apparently prevented the RADEON_VERTS flag from being enabled. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-20r300/compiler: Fix R300 fragment program regression introduced by 0723cd1...Nicolai Hähnle
We obviously need to move the code addr register backwards because their may be overlap. This bug affected in particular the Compiz water plugin. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-18[i965] add a missing header fileZou Nan hai
2009-09-18 [i965] use intel_batchbuffer_flush to flush the clearZou Nan hai
2009-09-16Merge branch 'mesa_7_5_branch' into mesa_7_6_branchIan Romanick
Conflicts: src/mesa/main/dlist.c
2009-09-16intel: Deassociated drawables from private context struct in intelUnbindContextIan Romanick
The generic DRI infrastructure makes sure that __DRIcontextRec::driDrawablePriv and __DRIcontextRec::driReadablePriv are set to NULL after unbinding a context. However, the intel_context structure keeps cached copies of these pointers. If these cached pointers are not NULLed and the drawable is actually destroyed after unbinding the context (typically by way of glXDestroyWindow), freed memory will be dereferenced in intelDestroyContext. This should fix bug #23418.
2009-09-16i965: do a flush in clear, fix openarena render issue,Zou Nan hai
fd.o bug# 23857
2009-09-11radeon: Remove structure allocation from iterator variable.Pauli Nieminen
dma_bo varaible is only used for iterating so allocating memory for it only causes memory leaks.
2009-09-10intel: disable intel_stencil_drawpixels() for nowBrian Paul
It doesn't work reliably even when all the prerequisite checks are made.
2009-09-10Fix merge failIan Romanick
One of the conflicst from this merge was missed: commit 0c309bb494b6ee1c403442d1207743f749f95b6e Merge: c6c44bf d27d659 Author: Brian Paul <brianp@vmware.com> Date: Wed Sep 9 08:33:39 2009 -0600
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