Age | Commit message (Expand) | Author |
2008-11-28 | i965: Fix clashing enums for BRW_NEW_INDICES/VERTICES versus BATCH/DEPTH_BUFFER. | Eric Anholt |
2008-11-28 | i965: Remove BRW_WM_LOCK dirty bit, introduced to work around lack of relocs. | Eric Anholt |
2008-11-28 | i965: Add debug code for dumping how frequently different dirty bits are set. | Eric Anholt |
2008-11-28 | i915: Remove dead early z enable bit which was always on. | Eric Anholt |
2008-11-28 | i965: Reduce fast-pathiness of brw_try_draw_prims, bringing in important checks. | Eric Anholt |
2008-11-21 | i965: Add support for accelerated CopyTexSubImage. | Eric Anholt |
2008-11-21 | intel: Don't glBitmap fallback with scissoring enabled. | Eric Anholt |
2008-11-21 | i915: Don't overwrite i915's Viewport function from generic code. | Eric Anholt |
2008-11-20 | intel: fix i830 comment + backwards VB offsets. | airlied |
2008-11-20 | intel: fix i8xx vbo enable bit | airlied |
2008-11-20 | intel: add lots of i830 engine to intel_decode debug | airlied |
2008-11-12 | i965: Upload state on primitive switch, don't just prepare it. | Eric Anholt |
2008-11-12 | i965: Fix VB refcount leak on aperture overflow. | Eric Anholt |
2008-11-12 | i965: Fix up VS max_threads for G4X and removing a magic number. | Eric Anholt |
2008-11-12 | i965: Fix up SF max_threads. | Eric Anholt |
2008-11-12 | i965: Fix up clip min_nr_entries, preferred_nr_entries, and max_threads. | Eric Anholt |
2008-11-12 | i965: Update WM maximum threads for G4X. | Eric Anholt |
2008-11-12 | i965: Add a big comment explaining my understanding of URB management. | Eric Anholt |
2008-11-11 | intel: reset cliprect_mode to IGNORE_CLIPRECTS. | Xiang, Haihao |
2008-11-10 | mesa: restore glapi/ prefix on #include | Brian Paul |
2008-11-10 | GLX: fix out-of-bounds memory issue in indirect glAreTexturesResident() | Brian Paul |
2008-11-10 | dri: alloc __DRIscreen object with calloc() | Brian Paul |
2008-11-06 | mesa: rename OPCODE_INT -> OPCODE_TRUNC | Brian Paul |
2008-11-06 | i965: Always check vertex program. | Xiang, Haihao |
2008-11-05 | i965: Implement missing OPCODE_NOISE3 instruction in fragment shaders. | Gary Wong |
2008-11-02 | i965: Clean up stale NDC comment. | Eric Anholt |
2008-11-02 | i965: Avoid vs header computation for negative rhw on G4X. | Eric Anholt |
2008-11-02 | i965: Merge GM45 into the G4X chipset define. | Eric Anholt |
2008-11-02 | i965: Fix copy'n'paste issue that made brw->urb.constrained useless. | Eric Anholt |
2008-11-01 | Fix for 58dc8b7: dest regions must not use HorzStride 0 in ExecSize 1 | Keith Packard |
2008-10-31 | intel: pixelzoom doesn't apply to glBitmap, so disable the fallback. | Eric Anholt |
2008-10-31 | intel: Remove fallback for glDrawPixels(GL_COLOR_INDEX) | Eric Anholt |
2008-10-31 | intel: Add more fallback debugging for glDrawPixels. | Eric Anholt |
2008-10-31 | i965: implement the missing OPCODE_NOISE1 and OPCODE_NOISE2 instructions. | Gary Wong |
2008-10-31 | i965: support destination horiz strides in align1 access mode. | Gary Wong |
2008-10-28 | intel: Fix glDrawPixels with 4d RasterPos. | Eric Anholt |
2008-10-28 | i965: Fix check_aperture calls to cover everything needed for the prim at once. | Eric Anholt |
2008-10-28 | intel: Don't keep intel->pClipRects, and instead just calculate it when needed. | Eric Anholt |
2008-10-28 | i965: Allocate temporaries contiguously with other regs in fragment shaders. | Gary Wong |
2008-10-27 | i965: Fix compiler warning from unused var. | Eric Anholt |
2008-10-27 | i965: Remove dead brw->wrap flag. | Eric Anholt |
2008-10-27 | intel: Use dri_bo_get_tiling to get tiling mode of buffers we get from names. | Eric Anholt |
2008-10-26 | intel: GL_FALSE on a BO if it won't be modified when mapping this BO. (thanks... | Xiang, Haihao |
2008-10-24 | i965: don't emit state when dri_bufmgr_check_aperture_space fails. | Xiang, Haihao |
2008-10-24 | intel: fallback for intelEmitCopyBlit. | Xiang, Haihao |
2008-10-21 | i915: fix carsh in i830_emit_state. (bug #17766) | Xiang, Haihao |
2008-10-16 | fix span issue with really old ddx and non-tcl r100 chips | Roland Scheidegger |
2008-10-13 | i915: Texture instructions use r/t/oC/oD register as texture coordinate. | Xiang, Haihao |
2008-10-11 | intel: Add acceleration for glDrawPixels(GL_STENCIL_INDEX). | Eric Anholt |
2008-10-10 | intel: GLSL 1.20 is broken in Mesa, so disable it in the i965 driver | Ian Romanick |