| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2008-01-04 | i915: don't validate PS program when falling back to software | Xiang, Haihao | |
| rendering. fix #12786 | |||
| 2008-01-04 | intel: some initialization for dri_bufmgr_ttm | Xiang, Haihao | |
| 2008-01-03 | [intel] Add a single-entry relocation buffer cache. | Eric Anholt | |
| By avoiding the repeated relocation buffer creation/map/unmap/destroy for each new batch buffer, this improves OpenArena framerates by 30%. Caching batch buffers themselves doesn't appear to be a significant performance win over this change. | |||
| 2008-01-03 | [intel] Convert relocations to not be cleared out on buffer submit. | Eric Anholt | |
| We have two consumers of relocations. One is static state buffers, which want the same relocation every time. The other is the batchbuffer, which gets thrown out immediately after submit. This lets us reduce repeated computation for static state buffers, and clean up the code by moving relocations nearer to where the state buffer is computed. | |||
| 2008-01-03 | [965] Fix some missing initialization in WM keys. | Eric Anholt | |
| 2008-01-03 | fix fd.o bug #13761 | Zou Nan hai | |
| MRD computation is now changed in mesa core | |||
| 2008-01-02 | [965] Convert WM unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert VS unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert SF unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert GS unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert clip unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert CC unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert surface state to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert sampler state to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | Revert "[intel] Use the memory type mask containing the caching flags." | Eric Anholt | |
| This reverts commit 8bb9ae3693362a302206255c61f512d942df9bbf. Validating our kernel buffers with the caching off in flags but on in mask means that the kernel migrates the buffer to be uncached, which is undesired. | |||
| 2008-01-02 | [intel] Use the memory type mask containing the caching flags. | Eric Anholt | |
| 2008-01-02 | Set correct flags mask when validating buffers. | Keith Packard | |
| The 'mask' value used in the validation operation specifies which of the 'flags' bits are being modified. Buffer validation wants to pass the memory type and access mode (rwx) to the kernel so that the buffer will be placed correctly, and so that the right kind of fence will be created (read vs write). That means we actually want a constant mask for these operations, and not something computed from the bits coming in. The constant we want is DRM_BO_MASK_MEM | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE. | |||
| 2008-01-02 | [965] Improve performance by including reloc target buffer pointers in keys. | Eric Anholt | |
| Without this, the WM binding tables would all collide, for example. Improves openarena performance by around 2%. | |||
| 2008-01-02 | i915: Needn't adjust pixel centers. fix #12944 | Xiang, Haihao | |
| 2008-01-02 | Revert "r300: fix bug with maniadrive rendering" | Dave Airlie | |
| this is correct, there is another issue with sw fallbacks This reverts commit cc50edbca2fd3111f9987d4117fa6656599d79dc. | |||
| 2008-01-02 | rx00: fix off by one error in tempreg check | Hans de Goede | |
| 2008-01-02 | r300: fix bug with maniadrive rendering | Dave Airlie | |
| I've no idea why I added this so I'll have to spend time tracking it down | |||
| 2007-12-29 | fix fd.o bug #13847 | Zou Nan hai | |
| 2007-12-28 | Bug #13839: Fix 3D texture offset miscalculation with pixels versus bytes. | Roland Scheidegger | |
| 2007-12-27 | i915: reset swrast state after calling swrast DrawPixels. | Xiang, Haihao | |
| In order to optimize DrawPixels, the i915 texenv program isn't applied to swrast DrawPixels in the i915 driver. This causes this program isn't applied to any following swrast functions. Resetting the swrast state fixes this issue. Fix #13614 | |||
| 2007-12-25 | i915: apply commit a0a5e8cfc04c14873441b50f7d594ef11806b9a8 from 965. | Xiang, Haihao | |
| fix #11925 | |||
| 2007-12-24 | __driConfigOptions must be PUBLIC. | Adam Jackson | |
| 2007-12-24 | R300: RV410 SE chips have half the pipes of regular RV410 | Alex Deucher | |
| This fixes 3D rendering on x700 SE chips. Reported by Kano. | |||
| 2007-12-22 | fix GL_LINE_LOOP with drivers using own render pipeline stage (#12410, #13527) | Roland Scheidegger | |
| primitive needs to include the begin/end flags (broken since vbo-0.2). Should fix missing first/last line segment on gamma, i810, i915, mga, r200, radeon, s3v, savage, unichrome (r300 already correct). Tested on r200, fixes #13527. | |||
| 2007-12-21 | Silence compiler warnings from XML error macros. | Kristian Høgsberg | |
| 2007-12-21 | [965] Fix and enable separate stencil. | Eric Anholt | |
| Note that this does not enable GL_EXT_stencil_two_side, because Mesa's computed _TestTwoSide ends up respecting only STENCIL_TEST_TWO_SIDE_EXT (defaults to GL_FALSE), even if the application uses only GL 2.0 / ATI entrypoints. | |||
| 2007-12-21 | [intel] Move some pixel path support from drivers to shared. | Eric Anholt | |
| 2007-12-21 | intel: cast a pointer to unsigned long, avoid potential error. | Xiang, Haihao | |
| 2007-12-20 | [965] Enable EXT_framebuffer_object. | Eric Anholt | |
| To do so, merge the remainnig necessary code from the buffers, blit, span, and screen code to shared, and replace it with those. | |||
| 2007-12-20 | [965] Actually enable SGIS_generate_mipmap. | Eric Anholt | |
| 2007-12-20 | [intel] Fix and reenable (software) SGIS_generate_mipmap | Eric Anholt | |
| The core problem was that _mesa_generate_mipmap was not respecting RowStride of the source image. Additionally, the intel private data associated with the images (level and face) was not being initialized for the _mesa_generate_mipmap-generated images. | |||
| 2007-12-20 | [intel] Allow driver hooks to be NULL in intel_buffers.c and just update flags. | Eric Anholt | |
| The 965 driver relies on flag checking instead of these hooks, and will be using this code soon. | |||
| 2007-12-20 | [i915] Move meta_draw_quad into the vtbl with other meta operations. | Eric Anholt | |
| 2007-12-20 | i915: avoid dead lock in intel_meta_draw_poly. fix #13696 | Xiang, Haihao | |
| 2007-12-18 | [915] Set cliprects in the drawbuffer software fallback case as well. | Eric Anholt | |
| Otherwise, we may violate cliprect asssertions on clearing the buffers, which isn't affected by the fallback. | |||
| 2007-12-19 | i965: allocate GRF registers before building subroutines, | Xiang, Haihao | |
| it ensures there are sufficient registers for all subroutines. | |||
| 2007-12-19 | i965: restore the flag after building the subroutine of the | Xiang, Haihao | |
| GS thread. fix #13240 | |||
| 2007-12-18 | [915] Free dri_bufmgr after mesa context data. | Eric Anholt | |
| Fixes a crash when buffer objects are left around until context destroy. | |||
| 2007-12-18 | [915] Make polygon stipple use pre-unpacked pixel data. | Eric Anholt | |
| This fixes a crash when stippling using data from a PBO. | |||
| 2007-12-18 | [915] Fix clear color when clearing with triangles. | Eric Anholt | |
| The diffuse color format is always ARGB32, regardless of the destination surface format. | |||
| 2007-12-18 | [INTEL] Fix 965 to use new centralized mipmap pitch function | Keith Packard | |
| 2007-12-18 | [Intel] Centralize mipmap pitch computations. | Keith Packard | |
| mipmap pitches must account for the device alignment requirements, which used to be fairly simple; just align to a 4-byte boundary. However, to allow textures to be drawn to under TTM, they now need to be aligned to a 64-byte boundary. Placing all of the alignment constraints in a single function allows this new constraint to be applied uniformly. There was some pitch constraining code in intel_miptree_create, but that was modifying the pitch long after the miptree had been layed out, so it only served to wreck the mipmap and cause rendering errors. | |||
| 2007-12-17 | [i915] Remove redundant set_draw_region code (like the comment says). | Eric Anholt | |
| 2007-12-17 | [intel] Improve INTEL_DEBUG=blit description of clearing. | Eric Anholt | |
| 2007-12-17 | [intel] Fix copy'n'pasteo in decoding of the blit clear packet. | Eric Anholt | |
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index : android-x86-mesa.git | |
| Androïd/x86 port of Mesa drivers | Hugues Hiegel |
| summaryrefslogtreecommitdiff |