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path: root/src/mesa/drivers/dri
AgeCommit message (Expand)Author
2009-08-07intel: Add some more safety asserts in the blit code.Eric Anholt
2009-08-07i965: Replace the subroutine-skipping jump in VS with a NOP if it's a NOP.Eric Anholt
2009-08-07radeon: correct fix for tiling with the legacy buildAlex Deucher
2009-08-07intel: Fix googleearth by avoiding GL_VIEWPORT_BIT in meta clear push/popEric Anholt
2009-08-07radeon: fix the build with older drm headersAlex Deucher
2009-08-07dri: Fix problems with unitialized values in dri screen object.Pauli Nieminen
2009-08-07i965: minor context commentsBrian Paul
2009-08-07intel: minor context commentsBrian Paul
2009-08-07intel: move blit call out of assert()Brian Paul
2009-08-07intel: fix typo: s/softare/software/Brian Paul
2009-08-07radeon: enable tiling fallbacks in 3D driver.Dave Airlie
2009-08-07radeon span: add r200 depth/stencil span read/writingDave Airlie
2009-08-07r200: fix scissor emission for r200 under kmsDave Airlie
2009-08-06mesa: IgnoresJakob Bornecrantz
2009-08-05i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt
2009-08-05Merge branch 'mesa_7_5_branch'Brian Paul
2009-08-05r200: emit colorpitchDave Airlie
2009-08-04i965: Fix dangerous warning I let slip in.Eric Anholt
2009-08-04i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt
2009-08-04i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt
2009-08-04i965: Don't set pop_count in the reserved MBZ area of IF statements.Eric Anholt
2009-08-04i965: Print out ELSE and ENDIF src1 arguments like IF does.Eric Anholt
2009-08-05r200: fix off-by-one errors causing 6th texture unit to not workRoland Scheidegger
2009-08-05r200: fix compiler warning (unused var)Roland Scheidegger
2009-08-05radeon: fix miptree comparison breakageRoland Scheidegger
2009-08-05intel: implement intelCompressedTexSubImage2DRoland Scheidegger
2009-08-04intel: Add support for EXT_provoking_vertex.Eric Anholt
2009-08-04i965: Spell "conditional" correctly.Eric Anholt
2009-08-04i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.Eric Anholt
2009-08-04i965: Initial import of disasm code from intel-gen4asm.Eric Anholt
2009-08-04i965: warning fixEric Anholt
2009-08-04i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt
2009-08-04intel: Fix inverted test for disabling flushing of front buffer output.Brian Paul
2009-08-04intel: Wait on the last swapbuffers to complete before queuing a new one.Brian Paul
2009-08-03i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt
2009-08-03i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt
2009-08-03i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt
2009-08-03i965: Don't emit bad packets when no VBs are referenced.Eric Anholt
2009-08-03i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt
2009-08-04radeon: more fixes for compressed texturesRoland Scheidegger
2009-08-03radeon: Fix inverted test for disabling flushing of front buffer output.Eric Anholt
2009-08-03intel: Fix inverted test for disabling flushing of front buffer output.Eric Anholt
2009-08-03intel: Wait on the last swapbuffers to complete before queuing a new one.Eric Anholt
2009-08-03r600: add some new r7xx pci idsAlex Deucher
2009-08-03egl: Replace IsBound by a pointer to the binding.Chia-I Wu
2009-08-03r600: add some missing pci idsAlex Deucher
2009-08-03r600: fix the build when RADEON_DEBUG_BO is setAlex Deucher
2009-08-03r600: fix r600SetTexOffsetAlex Deucher
2009-08-02r600: handle state emit betterAlex Deucher
2009-08-02r600: Logic Operations Fixvehemens
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