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So I didn't touch r300compiler, but r300g now compiles after having
declarations and code untangled. As nha so gently points out, we shouldn't
have to do this just to comply with MSVC compilers.
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intel_pixel_read.c: In function ‘do_blit_readpixels’:
intel_pixel_read.c:221: warning: cast from pointer to integer of
different size
Cast via an intermediate (GLintptr) instead and hope the result fits
within GLuint... [It should as we simply do not support textures *that*
large!]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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This should catch the common programming error where we attempt to
emit a relocation to beyond the end of the target buffer.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Fixes crash with compiz magnifier plugin.
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no longer used now that the hw supports this natively.
Also, clean up some formatting.
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Need to check if we'll take the software path so which requires mapping the
src texture image.
Fixes crash in piglit gen-compressed-teximage, bug 24219. However, the
test still does not pass (it may never have).
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This is useful for enabling our GLSL testcases using the 2.0 entrypoints
even though we don't have full GL 2.0.
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Other vendors have enabled ARB_fragment_shader as part of OpenGL 2.0
enablement even on hardware like the 915 with no dynamic branching or
dFdx/dFdy support. But for now we'll leave it disabled because we don't
do any flattening of ifs or loops, which is rather restrictive.
This support is not complete, and may be unstable depending on your shaders.
It passes 10/15 of the piglit glsl tests, but hangs on glean glsl1.
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Since the TNL is all done in software anyway, it should be the same to
the user who's probably using ARB_vertex_program otherwise, but gives them
a nicer programming environment.
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This fixes potential heap trashing if the program of choice exceeds limits,
and fixes the native instructions limit being lower than what can be
used by valid programs.
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Previously, we were doing it in the midst of the pipeline run, which gave
an opportunity to enable/disable fallbacks, which is certainly the wrong
time to be doing so. This manifested itself in a NULL dereference for PutRow
after transitioning out of a fallback during a run_pipeline in glean glsl1.
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This reverts commit e7044d552c6d16389447880b8744a51de1cf0199. It
prevented the driver from ever recovering from a software fallback due
to a program error. The original bug it claimed to fix doesn't appear to
exist post-revert.
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Previously, we'd go trashing the heap.
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It's misleading to report things like the program having too many native
instructions as a Mesa implementation error, when the program may just be
too big for the hardware.
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Once we've freed a miptree, we won't see any more state cache requests
that would hit the things that pointed at it until we've let the miptree
get released back into the BO cache to be reused. By leaving those
surface state and binding table pointers that pointed at it around, we
would end up with up to (500 * texture size) in memory uselessly consumed
by the state cache.
Bug #20057
Bug #23530
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makes blend functions work better
Signed-off-by: Dave Airlie <airlied@linux.ie>
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Signed-off-by: Dave Airlie <airlied@linux.ie>
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Makes doom3 alot nicer..
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Conflicts:
src/mesa/shader/program_parse.tab.c
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Avoids an unnecessary fallback.
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Conflicts:
src/mesa/drivers/dri/intel/intel_clear.c
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Bug #23760 (crashes in wine)
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This fixes the clears in openarena with the new metaops clear code, and
the new piglit vbo-subdata-sync test.
Bug #23857.
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Its flagging of extra state that's already flagged by the vtbl new_batch
when appropriate was confusing my tracking down of the OA clear bug.
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Conflicts:
src/mesa/vbo/vbo_exec_array.c
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This is similar to what r300 does inside the driver, but I've added it as
a generic option since it seems most hardware will want it.
Fixes piglit nv-init-zero-reg.vpfp and nv-init-zero-addr.vpfp.
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If there happened to be a bound VBO when intel_generate_mipmap() was
called we blew up because of a bad vertex array pointer.
Fixes regnumonline, bug 23859.
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Radeon generic scissors code had problem that some of code was using exclusive
and some inclusive bottom right corner. Only r600 driver is using exclusive
coordinate so changed generic code to pass inclusive coordinate and r600 driver
changes BR coordinate to be exclusive.
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Conflicts:
src/mesa/drivers/dri/r600/r700_assembler.c
src/mesa/drivers/dri/r600/r700_chip.c
src/mesa/drivers/dri/r600/r700_render.c
src/mesa/drivers/dri/r600/r700_vertprog.c
src/mesa/drivers/dri/r600/r700_vertprog.h
src/mesa/drivers/dri/radeon/radeon_span.c
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seems to work here ...
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128 gprs, 256 reg-based consts
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- max texture size is 8k, but mesa doesn't support
that at the moment.
- attempt to set shader limits to what the hw actually
supports
- clean up some old r300 cruft
- no need to explicitly disable irqs. This is fixed
in the drm now.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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- MUL_LIT is ALU.Trans instruction
- some Trans instructions can take 3 arguments
- don't clobber dst.x, use dst.z as temp, it'll get written correct
value in last insn
- respect source swizzles
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