| Age | Commit message (Collapse) | Author |
|---|
|
It complained about uninitialized values
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
|
|
When we finish emitting swtcl objects, we request space in the cmdbuf,
and flush if no space exists. However in this case we also flush
the DMA buffer we just put the vertices we wanted to send in.
This checks in advance if we have space in the buffer.
|
|
Before this change we would up emitting instructions with invalid register
numbers. This typically (but not always) hung the GPU. For now, just
prevent emitting bad instructions to avoid hangs. Still need to do some
kind of proper error recovery.
|
|
This is the size of the intermediate instruction buffer.
|
|
|
|
|
|
This function scans the shader to see if it has any GLSL features like
conditionals and loops. Calling this during state validation is expensive.
Just call it when the shader is given to the driver and save the result.
There's some new/temporary assertions to be sure we don't get out of sync
on this.
|
|
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
|
|
Remove fixed function fog setup.
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
|
|
Also cleanup sw tcl vertex buffer setup
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
|
|
Testing and regression fixes by Markus Amsler
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
|
|
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
|
|
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
|
|
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
|
|
|
|
|
|
|
|
This was causing hangs in cairogears, as we would blit to the 8bpp target
(A8 texture) as 16bpp, and stomp over state objects.
|
|
This is pretty much Eric Anholts implementation of clear using the GL state machine
from the Intel drivers.
It works quite well for now for us, probably could do with trying to use Z engine for
clears.
|
|
|
|
|
|
This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller
batchbuffers.
|
|
I keep wanting to hack this knob in as a one-time thing, so it seemed useful
to have all the time.
|
|
|
|
The 3D destination shares the same cache so we don't have any trouble with
the later commands needing the writes flushed inside of the same batchbuffer.
|
|
|
|
|
|
Instructions such as RCP, RSQ, LOG must smear the result of the function
across the dest register's X, Y, Z and W channels (subject to write masking).
Before this change, only the X component was getting written.
Among other things, this fixes cube map texture sampling in GLSL shaders
(since cube lookups involve normalizing the texcoord).
|
|
front_region may be null.
|
|
Plus fix up a debug printf.
|
|
|
|
|
|
|
|
|
|
this needs testing on real hw
|
|
|
|
The i965 hardware cannot do GL_CLAMP behavior on textures; an earlier
commit forced a software fallback if strict conformance was required
(i.e. the INTEL_STRICT_CONFORMANCE environment variable was set) and
2D textures were used, but it was somewhat flawed - it could trigger
the software fallback even if 2D textures weren't enabled, as long
as one texture unit was enabled.
This fixes that, and adds software fallback for GL_CLAMP behavior with
1D and 3D textures.
It also adds support for a particular setting of the INTEL_STRICT_CONFORMANCE
environment variable, which forces software fallbacks to be taken *all*
the time. This is helpful with debugging. The value is:
export INTEL_STRICT_CONFORMANCE=2
|
|
|
|
|
|
This gets DRI2 compiz going
|
|
|
|
need to write real hw user clear
|
|
|
|
|
|
|
|
this is a step towards fbos and should fix pageflipping, but
I think the first flip seems broken.
|
|
Remove all references to aux buffers 1..3. Keep AUX0 around for now just
in case, but it'll probably go too someday. I don't know of any OpenGL
drivers since the IRIX days that support aux color buffers.
|
|
s/FRAG_RESULT_DEPR/FRAG_RESULT_DEPTH/
s/FRAG_RESULT_COLR/FRAG_RESULT/COLOR/
Remove FRAG_RESULT_COLH (NV half-precision) output since we never used it.
Next, we might merge the COLOR and DATA outputs (COLOR0, COLOR1, etc).
|
|
Core mesa now unmaps the buffers if needed in these cases.
|
|
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
|
