Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-03-13 | i965: more register number assertions | Brian Paul | |
2009-03-13 | i965: add some register number assertions | Brian Paul | |
Haven't seen failures yet, but if/when there are, more investigation will be done. | |||
2009-03-13 | i965: remove unused PROGRAM_INTERNAL_PARAM, added comment | Brian Paul | |
2009-03-13 | i965: move declarations before code | Brian Paul | |
2009-03-13 | i965: debug code, use gl_register_file type | Brian Paul | |
2009-03-12 | i965: move declaration before code | Brian Paul | |
2009-03-12 | i965: fix const correctness | Brian Paul | |
2009-03-12 | i915: move declarations before code | Brian Paul | |
2009-03-12 | i965: comments | Brian Paul | |
2009-03-12 | i965: fix polygon stipple when rendering to FBO | Robert Ellison | |
The polygon stipple pattern, like the viewport and the polygon face orientation, must be inverted on the i965 when rendering to a FBO (which itself has an inverted pixel coordinate system compared to raw Mesa). In addition, the polygon stipple offset, which orients the stipple to the window system, disappears when rendering to an FBO (because the window system offset doesn't apply, and there's no associated FBO offset). With these fixes, the conform triangle and polygon stipple tests pass when rendering to texture. | |||
2009-03-12 | i965: add support for ATI_envmap_bumpmap | Roland Scheidegger | |
2009-03-12 | regenerate glapi | Roland Scheidegger | |
2009-03-11 | i965: fix polygon face orientation when rendering to FBO | Robert Ellison | |
In the i965, the FBO coordinate system is inverted from the standard OpenGL/Mesa coordinate system; that means that the viewport and the polygon face orientation have to be inverted if rendering to a FBO. The viewport was already being handled correctly; but polygon face was not. This caused a conform failure when rendering to texture with two-sided lighting enabled. This fixes the problem in the i965 driver, and adds to the comment about the gl_framebuffer "Name" field so that this isn't a surprise to other driver writers. | |||
2009-03-11 | intel: include main/viewport.h | Brian Paul | |
2009-03-11 | i965: fix lock-ups when GLSL program wrote to gl_FragDepth | Brian Paul | |
It seems the code that set up the FB_WRITE message was incomplete in this case. The number of payload registers was wrong and that caused a hang. It would be good to have a second set of eyes take a look at this... | |||
2009-03-10 | i965: more code clean-ups, comments | Brian Paul | |
2009-03-10 | i965: minor code clean-ups, comments | Brian Paul | |
2009-03-10 | i965: use new cast wrappers | Brian Paul | |
2009-03-10 | i965: added cast wrappers, comments | Brian Paul | |
2009-03-10 | i965: asst. code clean-ups, comments | Brian Paul | |
2009-03-10 | i965: fix typos in comments | Brian Paul | |
2009-03-09 | i965: fix cube map lock-up / corruption | Brian Paul | |
If we're using anything but GL_NEAREST sampling of a cube map, we need to use the BRW_TEXCOORDMODE_CUBE texcoord wrap mode. Before this, the GPU would either lock up or subsequent texture filtering would be corrupted. | |||
2009-03-09 | fix typo in fragment pipe alu define, should fix dot3_rgb tex combine | Roland Scheidegger | |
2009-03-07 | r300: remove assignment to removed StringPos field | Brian Paul | |
2009-03-07 | mesa: move glViewport and glDepthRange functions into new viewport.c file | Brian Paul | |
A bit of refactoring with an eye toward ES2 and GL 3.1 | |||
2009-03-07 | mesa: gl_register_file enum typedef | Brian Paul | |
2009-03-07 | mesa: remove GL_MESA_program_debug extension | Brian Paul | |
This was never fully fleshed out and hasn't been used. | |||
2009-03-07 | mesa: remove last of _mesa_unreference_framebuffer() calls | Brian Paul | |
2009-03-07 | r300: shut up valgrind | Maciej Cencora | |
It complained about uninitialized values Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
2009-03-06 | i965: check if we run out of GRF/temp registers | Brian Paul | |
Before this change we would up emitting instructions with invalid register numbers. This typically (but not always) hung the GPU. For now, just prevent emitting bad instructions to avoid hangs. Still need to do some kind of proper error recovery. | |||
2009-03-06 | i965: bump up BRW_EU_MAX_INSN | Brian Paul | |
This is the size of the intermediate instruction buffer. | |||
2009-03-06 | i965: comments | Brian Paul | |
2009-03-06 | i965: comments and minor clean-ups | Brian Paul | |
2009-03-06 | i965: avoid unnecessary calls to brw_wm_is_glsl() | Brian Paul | |
This function scans the shader to see if it has any GLSL features like conditionals and loops. Calling this during state validation is expensive. Just call it when the shader is given to the driver and save the result. There's some new/temporary assertions to be sure we don't get out of sync on this. | |||
2009-03-06 | r300: fix depth write regression (found by Nicolai Haehnle) | Maciej Cencora | |
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
2009-03-06 | r300: enable EXT_fog_coord extension | Maciej Cencora | |
Remove fixed function fog setup. Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
2009-03-06 | r300: route fog coord and W pos correctly | Maciej Cencora | |
Also cleanup sw tcl vertex buffer setup Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
2009-03-06 | r300: rewrite and hopefully simplify RS setup | Maciej Cencora | |
Testing and regression fixes by Markus Amsler Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
2009-03-06 | r300: add few macros for RS setup | Maciej Cencora | |
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
2009-03-06 | r300: silence valgrind | Maciej Cencora | |
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
2009-03-06 | r300: Print reg address when debugging is enabled | Maciej Cencora | |
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
2009-03-06 | r300: don't crash on sw tcl hw if point size vertex attrib is sent | Maciej Cencora | |
2009-03-05 | intel: Fix bpp setting of blits to 8bpp targets. | Eric Anholt | |
This was causing hangs in cairogears, as we would blit to the 8bpp target (A8 texture) as 16bpp, and stomp over state objects. | |||
2009-03-05 | i965: fix 3DPRIMITIVE batch decode of the vertex count field. | Eric Anholt | |
2009-03-05 | i965: Stop dumping programs after the first all-zeroes entry. | Eric Anholt | |
2009-03-05 | intel: Add always_flush_batch driconf option for making small batchbuffers. | Eric Anholt | |
This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller batchbuffers. | |||
2009-03-05 | intel: Add always_flush_cache driconf option for debugging cache flush failure. | Eric Anholt | |
I keep wanting to hack this knob in as a one-time thing, so it seemed useful to have all the time. | |||
2009-03-05 | i965: Add a note about why the _NEW_STENCIL is required in draw_buffers. | Eric Anholt | |
2009-03-05 | intel: Remove a gratuitous MI_FLUSH after clearing with a blit. | Eric Anholt | |
The 3D destination shares the same cache so we don't have any trouble with the later commands needing the writes flushed inside of the same batchbuffer. | |||
2009-03-05 | i965: Remove dead flushing code. | Eric Anholt | |