Age | Commit message (Collapse) | Author |
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This is similar to what r300 does inside the driver, but I've added it as
a generic option since it seems most hardware will want it.
Fixes piglit nv-init-zero-reg.vpfp and nv-init-zero-addr.vpfp.
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If there happened to be a bound VBO when intel_generate_mipmap() was
called we blew up because of a bad vertex array pointer.
Fixes regnumonline, bug 23859.
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Radeon generic scissors code had problem that some of code was using exclusive
and some inclusive bottom right corner. Only r600 driver is using exclusive
coordinate so changed generic code to pass inclusive coordinate and r600 driver
changes BR coordinate to be exclusive.
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seems to work here ...
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128 gprs, 256 reg-based consts
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- max texture size is 8k, but mesa doesn't support
that at the moment.
- attempt to set shader limits to what the hw actually
supports
- clean up some old r300 cruft
- no need to explicitly disable irqs. This is fixed
in the drm now.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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- MUL_LIT is ALU.Trans instruction
- some Trans instructions can take 3 arguments
- don't clobber dst.x, use dst.z as temp, it'll get written correct
value in last insn
- respect source swizzles
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registers takes radius
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1D tile span support for depth/stencil/color/textures
Z and stencil buffers are always tiled, so this fixes
sw access to Z and stencil buffers. color and textures
are currently linear, but this adds span support when we
implement 1D tiling.
This fixes the text in progs/demos/engine and progs/tests/z*
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Noticed by rnoland on IRC.
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with some minor updates from Richard.
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noticed by taiu on IRC.
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We use t->bo for dri1 since r600 uses CS for dri1.
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if we have a BO here it means TFP and we should have set it
up already.
tested by b0le on #radeon
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Fixes #22741
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Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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92033a9516942d7272ce4bf36ecd422009bbaf60 and 822c7964819ca1fcc270880d4ca8b3de8a4276d0
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Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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The handling is a bit inefficient, unfortunately, but I don't want to make
any intrusive changes for Mesa 7.6.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Since commit 2921a2555d0a76fa649b23c31e3264bbc78b2ff5 ('intel: Deassociated
drawables from private context struct in intelUnbindContext'),
intel->driDrawable may be NULL in intel_flush().
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This should help detecting possible memory leaks with dma buffers and prevent
possible visual corruption if data would be overwriten too early.
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Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Do-while makes macro safe to be used with if and for constructions.
Also remove __LINE__ macro from variable name because scope is local to macro anyway.
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Copy'n'paste apparently prevented the RADEON_VERTS flag from being enabled.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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We obviously need to move the code addr register backwards because their may
be overlap.
This bug affected in particular the Compiz water plugin.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Conflicts:
src/mesa/main/dlist.c
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The generic DRI infrastructure makes sure that __DRIcontextRec::driDrawablePriv
and __DRIcontextRec::driReadablePriv are set to NULL after unbinding a
context. However, the intel_context structure keeps cached copies of
these pointers. If these cached pointers are not NULLed and the
drawable is actually destroyed after unbinding the context (typically
by way of glXDestroyWindow), freed memory will be dereferenced in
intelDestroyContext.
This should fix bug #23418.
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fd.o bug# 23857
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dma_bo varaible is only used for iterating so allocating memory for it only
causes memory leaks.
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It doesn't work reliably even when all the prerequisite checks are made.
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One of the conflicst from this merge was missed:
commit 0c309bb494b6ee1c403442d1207743f749f95b6e
Merge: c6c44bf d27d659
Author: Brian Paul <brianp@vmware.com>
Date: Wed Sep 9 08:33:39 2009 -0600
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Conflicts:
src/mesa/drivers/dri/intel/intel_context.c
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This was a regression in 0f328c90dbc893e15005f2ab441d309c1c176245.
Bug #23688
Bug #23254
(cherry picked from commit 5604b27b9326ac542069a49ed9650c4b0d3e939a)
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Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Hopefully this will be one of the last cherry-picks.
(cherry picked from commit ca246dd186f9590f6d67038832faceb522138c20)
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Variadic functions can't be inlined which makes debugging to have quite large
function overead. Only aleternative method is to use variadic macros which are
inlined so compiler can optimize debugging to minimize overhead.
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Conflicts:
Makefile
configs/default
progs/glsl/Makefile
src/gallium/auxiliary/util/u_simple_shaders.c
src/gallium/state_trackers/glx/xlib/xm_api.c
src/mesa/drivers/dri/i965/brw_draw_upload.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/intel/intel_context.h
src/mesa/drivers/dri/intel/intel_pixel.c
src/mesa/drivers/dri/intel/intel_pixel_read.c
src/mesa/main/texenvprogram.c
src/mesa/main/version.h
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