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path: root/src/mesa/drivers/dri
AgeCommit message (Expand)Author
2009-09-24r600: enable caching of vertex programsAndre Maasikas
2009-09-24r600: check if textures are actually enabled before submissionAlex Deucher
2009-09-24r600: fix ftp for dri1Alex Deucher
2009-09-24r600: don't setup hardware state if TFPDave Airlie
2009-09-24r600: fix dri2 clippingAlex Deucher
2009-09-23r300: fallback to software rendering if we are out of free texcoordsMaciej Cencora
2009-09-22r300: Fix crash reported in bug #24066Nicolai Hähnle
2009-09-21radeon: update buffer map/unmap code for changes introduced in 92033a9516942d...Maciej Cencora
2009-09-21r300: fix a typoMaciej Cencora
2009-09-21r300: Zero-initialize register for NV_vertex_programNicolai Hähnle
2009-09-21r300: Fix handling of NV_vertex_program parametersNicolai Hähnle
2009-09-21Merge branch 'mesa_7_5_branch' into mesa_7_6_branchMichel Dänzer
2009-09-21intel: Fix crash in intel_flush().Michel Dänzer
2009-09-20radeon: Fix legacy bo not to reuse dma buffers before refcount is 1.Pauli Nieminen
2009-09-20r300/compiler: Fix trig instructions in R300 fpNicolai Hähnle
2009-09-20radeon: Fix typo in variable name.Pauli Nieminen
2009-09-20radeon: Improve WARN_ONCE macro to appear as single statement.Pauli Nieminen
2009-09-20radeon: Fix "verts" debugging enableNicolai Hähnle
2009-09-20r300/compiler: Fix R300 fragment program regression introduced by 0723cd1...Nicolai Hähnle
2009-09-18[i965] add a missing header fileZou Nan hai
2009-09-18 [i965] use intel_batchbuffer_flush to flush the clearZou Nan hai
2009-09-16Merge branch 'mesa_7_5_branch' into mesa_7_6_branchIan Romanick
2009-09-16intel: Deassociated drawables from private context struct in intelUnbindContextIan Romanick
2009-09-16i965: do a flush in clear, fix openarena render issue,Zou Nan hai
2009-09-11radeon: Remove structure allocation from iterator variable.Pauli Nieminen
2009-09-10intel: disable intel_stencil_drawpixels() for nowBrian Paul
2009-09-10Fix merge failIan Romanick
2009-09-10Merge branch 'mesa_7_5_branch' into mesa_7_6_branchIan Romanick
2009-09-10i965: Fix relocation delta for WM surfaces.Eric Anholt
2009-09-10intel: add B43 chipset supportZhenyu Wang
2009-09-10radeon: Change debugging code to use macros instead of inline functions.Pauli Nieminen
2009-09-09radeon: Add more verbose error message for failed command buffer.Pauli Nieminen
2009-09-09Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul
2009-09-08i965: fix incorrect test for vertex position attributeBrian Paul
2009-09-04i965: Fix warnings in intel_pixel_read.c.Eric Anholt
2009-09-04intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt
2009-09-04intel: Update Mesa state before span setup in glReadPixels.Eric Anholt
2009-09-04intel: Move intel_pixel_read.c to shared for use with i965.Eric Anholt
2009-09-04i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.Eric Anholt
2009-09-04intel: Align cubemap texture height to its padding requirements.Eric Anholt
2009-09-04intel: Align untiled region height to 2 according to 965 docs.Eric Anholt
2009-09-04i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt
2009-09-04i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt
2009-09-04i965: asst clean-ups, etc in brw_vs_emit()Brian Paul
2009-09-04i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt
2009-09-04i965: Spell "conditional" correctly.Eric Anholt
2009-09-04i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt
2009-09-04i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt
2009-09-04i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt
2009-09-04i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt
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