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path: root/src/mesa/drivers/dri
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2009-08-09r600: load per-pixel position into PS in order to use fragment.position.Cooper Yuan
This patch can fix /progs/fp/tri-depth, tri-depth2, tri-depthwrite, tri-depthwrite2 and point-position.
2009-08-07Revert "i965: Disable texture tiling by default."Eric Anholt
This reverts commit b8e638d4895d2d342306bb6443a455f73903ce20. Now that the known hangs and misrendering issues are fixed, I'm ready to start encouraging it by default again.
2009-08-07intel: Align region height as required for tiled regions.Eric Anholt
Otherwise, we would address beyond the end of our buffers. Fixes reliable GPU segfault with texture_tiling=true and oglconform shadow.c. Bug #22406.
2009-08-07i965: Add a note justifying domain choice for the SF VP.Eric Anholt
2009-08-07intel: Add some more safety asserts in the blit code.Eric Anholt
2009-08-07i965: Replace the subroutine-skipping jump in VS with a NOP if it's a NOP.Eric Anholt
This showed a 1.9% (+/-.3%, n=3) improvement in OA performance with high geometry settings.
2009-08-07radeon: correct fix for tiling with the legacy buildAlex Deucher
2009-08-07intel: Fix googleearth by avoiding GL_VIEWPORT_BIT in meta clear push/popEric Anholt
I have no idea why this fixes things, but being more efficient sounds good anyway. Fixes regression in 99d07d0f91ddd37926d08f4e7f10d55cac28d9a7 where most of the lit half of the world was not drawn.
2009-08-07radeon: fix the build with older drm headersAlex Deucher
2009-08-07dri: Fix problems with unitialized values in dri screen object.Pauli Nieminen
This fixes crash in r200 KMS driver when pSAREA was set to 1 randomly because of memory wasn't cleared. Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
2009-08-07i965: minor context commentsBrian Paul
2009-08-07intel: minor context commentsBrian Paul
2009-08-07intel: move blit call out of assert()Brian Paul
2009-08-07intel: fix typo: s/softare/software/Brian Paul
2009-08-07radeon: enable tiling fallbacks in 3D driver.Dave Airlie
Only really got good testing on r500 so far, need to enable in DDX and play some more.
2009-08-07radeon span: add r200 depth/stencil span read/writingDave Airlie
this should only really affect DRI2 since we mostly have a surface in DRI1. I don't think this is perfect yet, but it is a better start than nothing.
2009-08-07r200: fix scissor emission for r200 under kmsDave Airlie
2009-08-06mesa: IgnoresJakob Bornecrantz
Got tired of seeing these files in git status all the time
2009-08-05i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt
For some IZ setups, we'd forget to account for the source depth register being present, so we'd both read the wrong reg, and write output depth to the wrong reg. Bug #22603.
2009-08-05Merge branch 'mesa_7_5_branch'Brian Paul
Conflicts: src/mesa/main/state.c
2009-08-05r200: emit colorpitchDave Airlie
2009-08-04i965: Fix dangerous warning I let slip in.Eric Anholt
2009-08-04i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt
Fixes piglit glsl-vs-if-bool and progs/glsl/twoside, and will likely be useful for the looping code. Bug #18992
2009-08-04i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt
Previously, we'd be branching based on whatever condition code happened to be laying around.
2009-08-04i965: Don't set pop_count in the reserved MBZ area of IF statements.Eric Anholt
2009-08-04i965: Print out ELSE and ENDIF src1 arguments like IF does.Eric Anholt
2009-08-05r200: fix off-by-one errors causing 6th texture unit to not workRoland Scheidegger
both for normal and cube textures, this fixes demos/multiarb (with 6 enabled texture units) and fixes #23142.
2009-08-05r200: fix compiler warning (unused var)Roland Scheidegger
2009-08-05radeon: fix miptree comparison breakageRoland Scheidegger
another case of image never matching miptree in case of compressed textures
2009-08-05intel: implement intelCompressedTexSubImage2DRoland Scheidegger
similar to the radeon code. passes tests/texcompsub
2009-08-04intel: Add support for EXT_provoking_vertex.Eric Anholt
2009-08-04i965: Spell "conditional" correctly.Eric Anholt
2009-08-04i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.Eric Anholt
I was getting tired of doing the dance of INTEL_DEBUG=batch, copying it out, and running intel-gen4disasm on it.
2009-08-04i965: Initial import of disasm code from intel-gen4asm.Eric Anholt
There's a bunch of stuff from gen4asm and gpu-tools that we probably want to make into a library instead of cargo-culting it around.
2009-08-04i965: warning fixEric Anholt
2009-08-04i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt
Bug #20821
2009-08-04intel: Fix inverted test for disabling flushing of front buffer output.Brian Paul
The comment disagreed with the code, and nicely drew my eyes to what was going wrong. Bug #21774 (blender) Bug #21788 (readpix) (cherry picked from master, commit fd65418f600874b05f902b622078b40bc1abb24a)
2009-08-04intel: Wait on the last swapbuffers to complete before queuing a new one.Brian Paul
This fixes jerkiness in doom3 and other apps since the kernel change to throttle less absurdly, which led to a thundering herd of frames. Because this is a rather minimal fix, there is at least one downside: If the whole scene completes in one batchbuffer, we'll end up stalling the GPU. Thanks to Michel Dänzer for suggesting using glFlush to signal frame end instead of going to all the effort of adding a new DRI2 extension. (cherry picked from master, commit 0828579a658af01a64b5e699175dc9bbbedcd685)
2009-08-03i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt
This avoids sending a bad buffer address to the GPU due to programmer error, and is permitted by the ARB_vbo spec. Note that we still have the opportunity to dereference past the end of the GPU, because we aren't clipping to a correct _MaxElement, but that appears to be harder than it should be. This gets us the 90% solution. Bug #19911.
2009-08-03i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt
See comment on Vertex URB Entry Read Length for VS_STATE. This, combined with the previous three commits, fixes #22945.
2009-08-03i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt
This fix is just from code and docs inspection, but it may fix hangs on some applications.
2009-08-03i965: Don't emit bad packets when no VBs are referenced.Eric Anholt
It appears that sometimes Mesa (and I suppose a VS could as well) emits a program which references no vertex data, and thus we end up with nr_enabled == 0 even though some VBs are enabled. We'd end up emitting VB/VE packet headers of 0xffffffff in that case, leading to GPU hangs. Bug #22945 (wine with an uncompiled VS)
2009-08-03i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt
The code duplication bothered me.
2009-08-04radeon: more fixes for compressed texturesRoland Scheidegger
- fix not respecting required hardware stride with compressedTexImage - this fixes #22615. - make sure correct stride is used in various places - fix stored miptree never matching with a TexImage call with compressed texture - don't always store data with compressedtexsubimage at offset 0, and actually use the supplied pixel data... (untested) - make sure rows for compressed texture handling are rounded up not down Note that trying to access stored compressed textures in hardware miptrees from core mesa (get_compressed_teximage, swrast fallbacks) can't work correctly, since RowStride isn't really set to anything useful, plus some places (at least get_compressed_teximage) assume this data has native stride and no padding.
2009-08-03radeon: Fix inverted test for disabling flushing of front buffer output.Eric Anholt
(corresponding fix to the intel driver one)
2009-08-03intel: Fix inverted test for disabling flushing of front buffer output.Eric Anholt
The comment disagreed with the code, and nicely drew my eyes to what was going wrong. Bug #21774 (blender) Bug #21788 (readpix)
2009-08-03intel: Wait on the last swapbuffers to complete before queuing a new one.Eric Anholt
This fixes jerkiness in doom3 and other apps since the kernel change to throttle less absurdly, which led to a thundering herd of frames. Because this is a rather minimal fix, there is at least one downside: If the whole scene completes in one batchbuffer, we'll end up stalling the GPU. Thanks to Michel Dänzer for suggesting using glFlush to signal frame end instead of going to all the effort of adding a new DRI2 extension.
2009-08-03r600: add some new r7xx pci idsAlex Deucher
2009-08-03egl: Replace IsBound by a pointer to the binding.Chia-I Wu
IsBound tells if a context or surface is current. What it does not tell is, to which thread a context is current, or to which context a surface is current. This commit replaces IsBound by a pointer to the binding thread or context. Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2009-08-03r600: add some missing pci idsAlex Deucher