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path: root/src/mesa/drivers/dri
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2010-01-19r600: align to r300 changes in the blit codeMaciej Cencora
Pitch here means aligned width, not aligned width * bpp.
2010-01-19r300/r600: move some bo offsets checking to blit codeMaciej Cencora
In preperation for texcopy code sharing.
2010-01-19r600: prepare for some code sharingMaciej Cencora
2010-01-19r300: check if blitting for given format is supported earlierMaciej Cencora
Prevents failing assertions at later stage.
2010-01-19r300: use nearest texture filtering for accelerated blitsMaciej Cencora
2010-01-19r300: fix Y coord flipping in accelerated blitsMaciej Cencora
2010-01-19radeon: use mesa provided _mesa_tex_target_to_face functionMaciej Cencora
2010-01-19r300: prepare for texcopy code sharingMaciej Cencora
2010-01-19radeon: add blit function to vtblMaciej Cencora
2010-01-19intel: Remove dead note_fence vtbl hook.Eric Anholt
2010-01-19i965: Improve the hashing of brw_state_cache keys to include the cache_id.Eric Anholt
No measurable difference on cairoperf.
2010-01-19i965: Remove obsolete comment about the state atoms.Eric Anholt
2010-01-19i965: Upload as many VS constants as possible through the push constants.Eric Anholt
The pull constants require sending out to an overworked shared unit and waiting for a response, while push constants are nicely loaded in for us at thread dispatch time. By putting things we access in every VS invocation there, ETQW performance improved by 2.5% +/- 1.6% (n=6).
2010-01-19i965: Allow for variable-sized auxdata in the state cache.Eric Anholt
Everything has been constant-sized until now, but constant buffer handling changes will make us want some additional variable sized array.
2010-01-19intel: Use the new DRI2 flush invalidate entrypoint to signal frame done.Eric Anholt
Previously for frame throttling we would wait on the first batch after a swap before emitting another swap, because we had no hook after a swap was emitted. This meant that if an app managed to squeeze everything it for a frame had into one batch, it would lock-step with the GPU. With the swapbuffers changes, we now have the entrypoint we want. This takes the WoW intro screen from 25% GPU idle and visibly jerky to 4-5% GPU idle and rather smooth. Other apps such as OpenArena have run into this problem as well.
2010-01-19r100/r200/r600: fix typo in 2b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher
2010-01-19r100/r200/r600: check if blitting for given format is supported earlierAlex Deucher
based on Maciej's r300 patch.
2010-01-19r100/r200: add blit support for ARGB4444Alex Deucher
2010-01-18r60: Add relocs for CB_TILE/FRAGAlex Deucher
as per 46dc6fd3ed5ef96cda53641a97bc68c3bc104a9f
2010-01-18r100: add blit supportAlex Deucher
Only enabled with KMS.
2010-01-18r200: add blit supportAlex Deucher
Only enabled with KMS.
2010-01-18i965: Clean up constbuf handling by splitting reladdr/non-reladdr loads.Eric Anholt
The codepaths in the function were almost entirely different.
2010-01-18i965: Only set up the stack register if it's going to get used.Eric Anholt
2010-01-18i965: Fix loads of non-relative-addr constants after a reladdr load.Eric Anholt
Fixes piglit vp-arl-constant-array-huge-overwritten.
2010-01-18r600: fix some warningsAlex Deucher
2010-01-18r600: Update default state size to account for the new relocationJerome Glisse
the new relocation for CB_COLOR0_FRAG & CB_COLOR0_TILE add 4 dwords to the default command stream. Increase the prediction default size to take this into account
2010-01-18r6xx/r7xx: emit relocation for FRAG & TILE bufferJerome Glisse
FRAG & TILE buffer are unused but still they need to be associated with a valid relocation so that userspace can't try to abuse them to overwritte GART and then try to write anywhere in system memory.
2010-01-18r600: fix shadow_ambient shaderAndre Maasikas
rtype enums are different, DST_REG_OUTPUT got SRC_REG_CONSTANT in some shaders and produced invalid output/hang as TEX output is temp register always set out src to SRC_REG_TEMPORARY
2010-01-17radeon_compiler: include main/compiler.h for compiler portability macrosAlan Coopersmith
Signed-off-by: Alan Coopersmith <alan.coopersmith@sun.com> Reviewed-by: Corbin Simpson <MostAwesomeDude@gmail.com>
2010-01-16r600: remove stray END_BATCH in blit codeAlex Deucher
2010-01-15r600: improve blit supportAlex Deucher
- fill in more src/dst formats - disable depth copies for now - set proper data formats in render target regs - fill in additional default state The swizzles on some of the less used mesa formats are probably wrong.
2010-01-15r600: add initial blit supportAndre Maasikas
2010-01-15r600: add r600_blit.cAlex Deucher
Unfinished.
2010-01-11Merge branch 'master' of ssh://people.freedesktop.org/~jbarnes/mesaJesse Barnes
Conflicts due to DRI1 removal: src/mesa/drivers/dri/intel/intel_context.c src/mesa/drivers/dri/intel/intel_screen.c
2010-01-11radeon: fix prediction for r100 inline vert/elt emits.Dave Airlie
On r100 we emit the indices inline so we need to account for that in the emission size.
2010-01-11radeon: fix bug in realloc code.Dave Airlie
This bug was fixed in libdrm ages ago, port to non-kms
2010-01-09r300: minor accelerated blit fixesMaciej Cencora
2010-01-09r300: fallback on depth buffer blitsMaciej Cencora
Depth buffer accelerated blits aren't implemented yet.
2010-01-08intel/DRI2: add DRI2flushExtension support with invalidate hookKristian Høgsberg
Needed to support the SwapBuffers code properly. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
2010-01-08DRI2: add SwapBuffers supportJesse Barnes
Support the new DRI2 protocol request, DRI2SwapBuffers, in both direct and indirect rendering context. This request allows the display server to optimize back->front swaps (e.g. through page flipping) and allows us to more easily support other GLX features like swap interval and the OML sync extension in DRI2. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-01-08Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/mesa/drivers/dri/i965/brw_wm_emit.c
2010-01-08r300: Move initial declaration outside for loop.Vinson Lee
2010-01-07intel: Remove leftover symlinks from DRI1 removal.Eric Anholt
2010-01-07i810: use ColorMask[0]Brian Paul
2010-01-06r600: adjust after radeon mipmap changes in 7118db8700Andre Maasikas
R600_OUT_BATCH_RELOC doesn't really use offset so set it in TEX_RESOURCE2 + typo fix
2010-01-06r300/compiler: add full viewport transformation support in WPOS codegenMarek Olšák
2010-01-06r600: float texture component orderingPierre Ossman
The ordering of texture components was backwards for the floating point textures. Signed-off-by: Pierre Ossman <pierre@ossman.eu>
2010-01-06mesa: test index bounds before array elementRoel Kluin
Check whether the index is within bounds before accessing the array. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Brian Paul <brianp@vmware.com>
2010-01-06Make sure we use only signed/unsigned ints with bitfields.Michal Krol
Seems to be the only way to stay fully portable.
2010-01-06i965: fix invalid assertion in emit_xpd(), againBrian Paul
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