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path: root/src/mesa/drivers/dri
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2010-08-25intel: Support EGL_MESA_image_drmKristian Høgsberg
2010-08-25intel: Take an intel_screen pointer in intel_alloc_region_* functionsKristian Høgsberg
2010-08-25i965: Remove unnecessary header.Vinson Lee
2010-08-25r600: Include missing header in evergreen_fragprog.c.Vinson Lee
Include r600_emit.h for r600EmitShader and r600EmitShaderConsts symbols. Fixes the following GCC warnings. evergreen_fragprog.c: In function 'evergreenSetupFragmentProgram': evergreen_fragprog.c:521: warning: implicit declaration of function 'r600EmitShader' evergreen_fragprog.c:778: warning: implicit declaration of function 'r600EmitShaderConsts'
2010-08-25r600: Include missing header in evergreen_vertprog.c.Vinson Lee
Include r600_emit.h for r600EmitShader and r600EmitShaderConsts symbols. Fixes the following GCC warnings. evergreen_vertprog.c:614: warning: implicit declaration of function 'r600EmitShader' evergreen_vertprog.c:701: warning: implicit declaration of function 'r600EmitShaderConsts'
2010-08-24r300/compiler: Silence uninitialized variable warning.Vinson Lee
The variable loops would be used uninitialized if it ever processed a RC_OPCODE_ENDLOOP case first. This patch initalizes the loops variable to NULL and adds an assert at the RC_OPCODE_ENDLOOP case that loops isn't NULL. Silence the following GCC warning. r3xx_vertprog.c: In function 'translate_vertex_program': r3xx_vertprog.c:469: warning: 'loops' may be used uninitialized in this function
2010-08-24r300g: Add missing comma in SConscript.Vinson Lee
This is a follow-on patch to commit 574ba4b5f50bfe661427327cd792a8a200559376. Fixes r300g SCons build.
2010-08-24r600: Include missing header in evergreen_render.c.Vinson Lee
Fixes the following GCC warning. evergreen_render.c: In function 'evergreenTryDrawPrims': evergreen_render.c:836: error: implicit declaration of function 'evergreenSetupFragmentProgram'
2010-08-24r600: Remove unused variable.Vinson Lee
Silences the following GCC warning. evergreen_state.c: In function 'evergreenSetBlendState': evergreen_state.c:341: warning: unused variable 'id'
2010-08-24i965: Fix printf format warnings on 32-bit builds.Vinson Lee
2010-08-24r600: Remove unused variable.Vinson Lee
Fixes the following GCC warning. r600_emit.c In function 'r600AllocShaderConsts': r600_emit.c:59: warning: unused variable 'out'
2010-08-24r600: Remove spaces between backslash and newline.Vinson Lee
Fixes the following GCC warnings. r600_cmdbuf.h:201: warning: backslash and newline separated by space r600_cmdbuf.h:202: warning: backslash and newline separated by space
2010-08-25r300/compiler: implement elimination of unused constantsMarek Olšák
Wine likes to create a *lot* of constants, exceeding the size of the constant file in hw.
2010-08-25r300/compiler: terminate vertex shader compilation immediately after an errorMarek Olšák
Also rename "compiler" to "c".
2010-08-25r300/compiler: fail to compile if we hit hw limits or an unimplemented featureMarek Olšák
i.e. relative addressing (mainly FS), saturate modifiers, exceeding the maximum number of constants.
2010-08-25r300/compiler: handle indexable temporaries correctly in deadcode eliminationMarek Olšák
2010-08-25r300/compiler: disable register allocation for indexable temporaries in VSMarek Olšák
If there is relative addressing of temporaries, we cannot change register indices, so skip register allocation entirely. To utilize register allocation at least partially, we need separate indexable and non-indexable register files in both TGSI and Mesa IR.
2010-08-23intel: Add support for MAX_SAMPLES=1 EXT_framebuffer_multisample.Eric Anholt
The spec specifically sets the minimum MAX_SAMPLES at 1 to allow exposing the extension on all implementations, so do so.
2010-08-23radeon: print chip family for evergreen in renderer stringAlex Deucher
2010-08-23i965: Add sandybridge D0 pci idsZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-08-22i965: Fix 8-wide FB writes on gen6.Eric Anholt
My merge of Zhenyu's patch on top of my previous patches broke it by my code expecting simd16 single write and Zhenyu's simd8 path being disabled by mine. Merge the two for success.
2010-08-22i965: Fix brw_math1 with scalar argument in gen6 FS.Eric Anholt
The docs claim two conflicting things: One, that a scalar source is supported. Two, source hstride must be 1 and width must be exec size. So splat a constant argument out into a full reg to operate on, since violating the second set of constraints is clearly failing. The alternative here might be to do a 1-wide exec on a constant argument for math1. It would probably save cycles too. But I'll leave that for the glsl2-965 branch. Fixes glsl-algebraic-div-one-2.shader_test.
2010-08-22i965: Fix up WM push constant setup on gen6.Eric Anholt
Fixes glsl-algebraic-add-add-1.
2010-08-22i965: Use intel->gen >= 6 instead of IS_GEN6.Eric Anholt
2010-08-20evergreen : initial support driver code.richard
2010-08-20i965: Rename nr_depth_regs to nr_payload_regs.Eric Anholt
Only 8 out of the up to 13 regs are for source/dest depth, so the name wasn't particularly appropriate. Note that this doesn't count the constant or URB payload regs. Also, don't pre-divide by 2, so it's actually a number of registers.
2010-08-20i965: Also use the SIMD8 FB writes for SIMD8 mode on non-SNB.Eric Anholt
2010-08-20i965: Add support for FB writes on Sandybridge.Zhenyu Wang
2010-08-20i965: Set the destination horiz stride even for da16, as SNB seems to need it.Zhenyu Wang
2010-08-20i965: Set the maximum number of threads on Sandybridge.Zhenyu Wang
2010-08-20i965: Add AccWrCtl support on Sandybridge.Zhenyu Wang
Whenever the accumulator results are needed, this bit must be set.
2010-08-20i965: Mention the mlen and rlen for URB reads.Zhenyu Wang
2010-08-20i965: Sandybridge doesn't have Compr4 mode, since it's not needed any more.Zhenyu Wang
2010-08-20i965: Adjust disasm of subreg numbers to be in units of the register type.Zhenyu Wang
This makes reading the code easier when matching up to the specs, which also use this format.
2010-08-20i965: Fix DP write channel ordering on Sandybridge.Eric Anholt
The SIMD16 message no longer has the goofy interleaved format that made Compr4 compression necessary before.
2010-08-20intel: Don't try to do work for BufferSubData with a size of 0.Eric Anholt
If we hit the linear blit path, we'd come up with a pitch of 0, then divide by zero. Fixes vbo-subdata-zero, made for bug #28931 (warsow).
2010-08-20i965: Fix compile warnings on 64-bit Linux.Kenneth Graunke
format ‘%d’ expects type ‘int’, but argument 2 has type ‘long int’
2010-08-19i915: Remove unnecessary header from i830_context.c.Vinson Lee
2010-08-18i965: Set the if stack pop count when breaking out of a loop inside an if.Eric Anholt
Otherwise, we might end up with the if stack pointing at the wrong place. Fixes GPU hang with glsl-vs-if-loop.
2010-08-18i965: Don't set the swizzle on an immediate value in the VS.Eric Anholt
Fixes glsl-vs-if-nested (70.0 is not <= 70.000648 thanks to the swizzle bits getting set). Some safety checks are added to make sure this doesn't happen again as we increase the usage of immediate values in program generation.
2010-08-18glsl2: Free the shader compiler at dri screen destruction.Eric Anholt
Hooray, we can valgrind again without adding suppressions. This also adds an interface for use by an implementation of glReleaseShaderCompiler().
2010-08-18dri2: Clean up the common dri2 options at screen destroy.Eric Anholt
2010-08-18r600: implement SSG instructionAndre Maasikas
2010-08-18r600: implement DP2 opcodeAndre Maasikas
2010-08-17i965: Throw a link error when we see a "return" in main().Eric Anholt
We'll need to use the HALT instruction to do this right, like returns from other functions.
2010-08-17i915: Add support for SSG opcode.Eric Anholt
Fixes glsl-fs-sign and many of the tests of trig builtins.
2010-08-17i915: Add support for reading output regs in the FS.Eric Anholt
Fixes glsl-unused-varying and many others, since we produce an output reg read any time gl_FragColor is written inside an if statement.
2010-08-17i915: Add support for OPCODE_DP2.Eric Anholt
Fixes glsl-fs-dot-vec2.
2010-08-17i915: Enable ARB_fragment_shader by default.Eric Anholt
Now that we have glsl2 with if flattening in place, most shaders will just work. Remaining failing shaders will mostly be due to loop unrolling (in progress), some possible if flattening failures in inlining functions (planning on fixing), and the register/instruction count limits. While the GLSL and GLSL-ES specs say that shaders shouldn't fail to compile/link due to register/instruction limits, in practice we're not the first vendor to expose GLSL on hardware with these limitations. The benefit to application developers of providing a better language for GPU programming is greater than the pain of having to handle instruction limits (which they had to for ARB_fp on this hardware anyway)
2010-08-17r600c: Handle reads from PROGRAM_OUTPUTHenri Verbeet
with glsl2, reads from outputs are legal