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path: root/src/mesa/drivers/dri
AgeCommit message (Collapse)Author
2009-03-02mesa: use Stencil._Enabled field instead of Stencil.EnabledBrian Paul
2009-03-03radeon: remove debuggingDave Airlie
2009-03-03radeon: refactor framebuffer code like intelDave Airlie
this is a step towards fbos and should fix pageflipping, but I think the first flip seems broken.
2009-03-02mesa: remove unused AUX buffersBrian Paul
Remove all references to aux buffers 1..3. Keep AUX0 around for now just in case, but it'll probably go too someday. I don't know of any OpenGL drivers since the IRIX days that support aux color buffers.
2009-02-28mesa: rename, reorder FRAG_RESULT_x tokensBrian Paul
s/FRAG_RESULT_DEPR/FRAG_RESULT_DEPTH/ s/FRAG_RESULT_COLR/FRAG_RESULT/COLOR/ Remove FRAG_RESULT_COLH (NV half-precision) output since we never used it. Next, we might merge the COLOR and DATA outputs (COLOR0, COLOR1, etc).
2009-02-27intel: remove some unneeded buffer unmap callsBrian Paul
Core mesa now unmaps the buffers if needed in these cases.
2009-02-27i915: Add support for a new G33-like chipset.Shaohua Li
Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-02-27R300: add support for RS600 chipsAlex Deucher
2009-02-27R300: set the number of GB pipes on all r3xx-r5xx chipsAlex Deucher
2009-02-27i965: texture fixes: bordered textures, fallback renderingRobert Ellison
i965 doesn't natively support GL_CLAMP; it treats it like GL_CLAMP_TO_EDGE, which fails conformance tests. This fix adds a clause to the check_fallbacks() test to check whether GL_CLAMP is in use on any enabled 2D texture. If so, and if strict conformance is required (via INTEL_STRICT_CONFORMANCE), a software fallback is mandated. In addition, validate textures *before* checking for fallbacks, rather than after; otherwise, the texture state is never validated and can't be trusted. (In particular, if texturing is enabled and the sampler would access any level beyond level 0 of a texture, the sampler will segfault, because texture validation sets the firstLevel and lastLevel fields of a texture object so that the valid levels will be mapped and accessed correctly. If texture validation doesn't occur, only level 0 is accessed correctly, and that only because firstLevel and lastLevel happen to be set to 0.)
2009-02-27r300: make ste text buffer work with > 2048 on r500Dave Airlie
2009-02-27radeon: add more fbconfigsDave Airlie
this makes glxgears get its background back when running under DRI2
2009-02-27r300: remove depth offset exits in favour of rrb depth changesDave Airlie
2009-02-26intel: no-op the intel_finish_render_texture() functionBrian Paul
It doesn't have to do anything. See comments for more details.
2009-02-26intel: check texture formats in intel_validate_framebuffer()Brian Paul
We can't render into any texture format; only certain formats. Check that render-to-texture's format is renderable in the intel_validate_framebuffer() There seems to be a bug somewhere that causes rendering to rgb565 textures to be corrupted so disallow that for now. This will be revisted.
2009-02-26intel: updated comment, some debug code (disabled)Brian Paul
2009-02-26i965: rename draw_regions -> color_regionsroot
Be a little more specific about what these are.
2009-02-26i965: add missing init for region->widthBrian Paul
This doesn't seem to really effect anything but seeing width=0 in drawing regions was confusing.
2009-02-26mesa: replace old prog_instruction::Sampler field with Aux fieldBrian Paul
The i965 driver needs an extra instruction field for color output information. It was using the Sampler field for this. Use the Aux field instead. This will probaby be revisited at some point...
2009-02-26i965: whitespace/indentation fixesBrian Paul
2009-02-26intel: Revert disable of accelerated Bitmap, which slipped in with spans stuff.Eric Anholt
2009-02-27r200: fixup emit sizes for kmsDave Airlie
2009-02-27r200: port over cs emit changes from radeonDave Airlie
2009-02-26i965: fix for RHW workaroundXiang, Haihao
It is possible that an object whose vertices all are outside of a view plane is passed to clip thread due to the RHW workaround. This object should be rejected by clip thread. Fix bug #19879
2009-02-26radeon: fixup old packets emission for CS caseDave Airlie
2009-02-26intel: Disable creating DRI2 FBconfigs with depth size != color size.Eric Anholt
While it's a nice idea to be able to allow clients to choose a smaller (or bigger for 16bpp screens!) depth size, right now DRI2 hands back a buffer with a size that matches the drawable, rather than being based off of the visual. This led to problems in readback as parts of the driver disagreed on what format the depth buffer was really in. Fixes the remainder of bug #19447.
2009-02-26intel: Add span code for z24 without stencil.Eric Anholt
It seems that in this case the Mesa code is handing us x8z24 values instead of z24s8 values, so we need to not do the rotation. Fixes half of OGLconform depthrange.c. Bug #19447.
2009-02-25intel: make template wrappers for the spans templates.Eric Anholt
This is insanity, but so is copying the same blocks containing the actual interesting code in the file three times each for the different tile formats.
2009-02-25intel: Fix up x8r8g8b8 renderbuffer format so that alpha=1 spans code happens.Eric Anholt
I was lured into a false sense of security by the fact that the spans code was already there, and a bunch of tests didn't catch the problem. oglconform's mask.c did, though. Bug #19970.
2009-02-26r100: fixup kms state emissionsDave Airlie
2009-02-26radeon: avoid page flip code in DRI2Dave Airlie
2009-02-26radeon: enable DRI2 for r100Dave Airlie
2009-02-26radeon: move CB/ZB state init into emit codeDave Airlie
This removes the use of the sarea for this stuff so makes DRI2 easier and emits the CB/ZB info in the correct place
2009-02-26r300: fixup texture state emission for kms pathDave Airlie
2009-02-26r300: don't call page flip on DRI2Dave Airlie
2009-02-26r300: don't flush VAP too often.Dave Airlie
Flush the VAP the first time for each state atom we upload new VAP data
2009-02-25i965: Rename CMD_CONST_BUFFER_STATE to the CS_URB_STATE used in the docs.Eric Anholt
2009-02-25R300: Add support for RS600 chipsAlex Deucher
2009-02-25r300: drop r300Flush for the generic oneDave Airlie
2009-02-24r300: fix bo ref/unref, plugs DRI handle leaksDave Airlie
2009-02-23r300: fixup old setTexOffset DRI1 extensionDave Airlie
2009-02-23radeon: add more debug info to the flush debugDave Airlie
2009-02-23r300: revert back autostate change on cacheflush emitDave Airlie
2009-02-23r300: use OUT_BATCH_REGVAL in a few more placesDave Airlie
2009-02-23r300: set u to 0 so debug logs are easier to readDave Airlie
2009-02-23radeon: stabilise r300 driver like the F10 mesa bufmgrDave Airlie
For some reason flushs caused by this CS needs flush hook, caused the chip to lockup on r300 under compiz, whereas the F10 driver was rock solid.
2009-02-23radeon: add some debugging for flush ioctlsDave Airlie
2009-02-23radeon: make state atom print like old r300 codeDave Airlie
2009-02-23radeon: fixup legacy bo/cs out of VRAM waiting.Dave Airlie
This is similiar to the code from the F10 r300 bufmgr
2009-02-23i965: fix line stipple fallback for GL_LINE_STRIP primitivesRobert Ellison
When doing line stipple, the stipple count resets on each line segment, unless the primitive is a GL_LINE_LOOP or a GL_LINE_STRIP. The existing code correctly identifies the need for a software fallback to handle conformant line stipple on GL_LINE_LOOP primitives, but neglects to make the same assessment on GL_LINE_STRIP primitives. This fixes it so they match.
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