Age | Commit message (Collapse) | Author |
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The index is no longer necessary to share constants between multiple
SIN/COS/SCS instructions inside a single fragment program, and storing
a tiny implementation detail like this in the fragment_program structure
itself was just nasty.
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not sure which brw surface for DXT3 & DXT5, so restore
the previous choice.(changed in commit
84081774e62a8af18e6bf894ea69f63b97dcfe96)
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The constant/parameter allocation was significantly simplified, removing
one unnecessary copy operation of parameters. The dirty state tracking is
unchanged and far from optimal, since all state is always re-fetched.
Constants and parameters are now emitted only once, which significantly
reduces the resource pressure on larger programs.
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Also, fix a typo in a related comment.
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Make sure that instruction slots are fully initialized with NOPs during
find_and_prepare_slot(). This fixes a bug when a fragment program was
translated more than once (e.g. due to a second call to glProgramStringARB).
This partially fixes glean/fragProg1.
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This is a necessary change to emit the right instructions when writing
to result.depth.
However, even with this test, Z-write doesn't work properly, and I don't
fully understand why. In addition to this, we'll at least have to disable
early-Z, but even that doesn't seem to be enough.
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Fix a bug in the LIT implementation (clamp exponent to 128, not 0.5)
and change the implementation around. In theory, the new implementation
needs as little as 5 instruction slots. Unfortunately, the dependency
analysis in find_and_replace_slot is not strong enough to look at
individual components of a register yet.
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Do not move an instruction that writes to a temp forward past an instruction
that reads the same temporary.
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Dumps of fragment programs were incorrect when the program consisted of multiple
nodes.
Also, improved the formatting a bit.
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There were a number of bugs related to the pairing of vector and scalar
operations where swizzles ended up using the wrong source register,
or an instruction was moved forward and ended up overwriting an aliased
register.
The new algorithm for register allocation is quite conservative and may
run out of registers before necessary. On the plus side, It Just Works.
Pairing is done whenever possible, and in more cases than before, so
in practice this change should be a net win.
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Making modifications while the editor spawned by git-commit was suspended
didn't have the intended effect.
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Remove superfluous _mesa_resize_framebuffer call which is now harmful because
it causes the third renderbuffer to have width/height 0, so Mesa refuses to
render to it.
In the long term, it would be nice to remove the hack in
intel_alloc_window_storage in favour of a proper Mesa interface for flipping
between more than two colour buffers.
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choose the right mesa texformat for FXT1 & S3TC
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Note that insert_wpos in r300_vertexprog.c is still a little flaky and could be
improved.
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corrections.
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Bring over the optimizations for fog and normalized spot dir
from t_vp_build.c to brw_vs_tnl.c. Likewise, port a fix for point size
calc from brw_vs_tnl.c to t_vp_build.c (use ABS(eyez) instead of -eyez). Leave
the now differing point size calcs alone though, not sure what's better (it's
basically MOV, ABS, MUL, DP3 vs. ABS, MAD, MAD).
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ARB_vertex_buffer_object looks like a useful extension even for old chips.
The drivers should not need any code to be able to use this extension since
they just use mesa's vbo code anyway.
Newly enabled for i810, mach64, mga, r128, radeon, savage, sis and unichrome.
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enough information is known about them to be sure as to what the values mean.
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Note that just like the values written to R300_RB3D_DSTCACHE_CTLSTAT these
values are really unknown; ideally more reverse engineering should be done to
determine what these values mean and when they should be set.
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R300_RB3D_DSTCACHE_02 or R300_RB3D_DSTCACHE_0A, rather than hexadecimal values.
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This can be the case on some systems when running glxinfo.
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Compute half if LOCAL_VIEWER is enabled and the light is
a directional source.
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