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Since the recent renderbuffer refcounting fixes it's no longer sufficient to
just remove the old renderbuffer from the framebuffer and then add the new one
because the former may decrease the reference count to 0 and delete the old
renderbuffer.
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values for nr of entries) should meet the requirement.
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The texture_rectangle fix introduced a bug where every texture instruction
caused a new indirection.
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Still crashes out on scissor regs
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R300 hardware takes texcoords in the range 0..1 even for rectangle
textures. Previously, the necessary texcoord conversion was applied
to the texture coordinate during vertex processing in a render stage.
This is obviously wrong when fragment programs are used, which can
calculate arbitrary coordinates for TEX instructions. Therefore,
we now inject an appropriate MUL instruction before a TEX that
reference a rectangle texture.
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There used to be an assertion when a fragment program accesses an incomplete
texture image. Work around this assertion.
Note: I am unsure whether this workaround produces the desired result
(0,0,0,1) on all hardware.
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When no textures were enabled, a KIL instruction triggered an assertion
in r300_setup_rs_unit.
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StateFlags has been updated in _mesa_add_state_reference
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The index is no longer necessary to share constants between multiple
SIN/COS/SCS instructions inside a single fragment program, and storing
a tiny implementation detail like this in the fragment_program structure
itself was just nasty.
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not sure which brw surface for DXT3 & DXT5, so restore
the previous choice.(changed in commit
84081774e62a8af18e6bf894ea69f63b97dcfe96)
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The constant/parameter allocation was significantly simplified, removing
one unnecessary copy operation of parameters. The dirty state tracking is
unchanged and far from optimal, since all state is always re-fetched.
Constants and parameters are now emitted only once, which significantly
reduces the resource pressure on larger programs.
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Also, fix a typo in a related comment.
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Make sure that instruction slots are fully initialized with NOPs during
find_and_prepare_slot(). This fixes a bug when a fragment program was
translated more than once (e.g. due to a second call to glProgramStringARB).
This partially fixes glean/fragProg1.
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This is a necessary change to emit the right instructions when writing
to result.depth.
However, even with this test, Z-write doesn't work properly, and I don't
fully understand why. In addition to this, we'll at least have to disable
early-Z, but even that doesn't seem to be enough.
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Fix a bug in the LIT implementation (clamp exponent to 128, not 0.5)
and change the implementation around. In theory, the new implementation
needs as little as 5 instruction slots. Unfortunately, the dependency
analysis in find_and_replace_slot is not strong enough to look at
individual components of a register yet.
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Do not move an instruction that writes to a temp forward past an instruction
that reads the same temporary.
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Dumps of fragment programs were incorrect when the program consisted of multiple
nodes.
Also, improved the formatting a bit.
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There were a number of bugs related to the pairing of vector and scalar
operations where swizzles ended up using the wrong source register,
or an instruction was moved forward and ended up overwriting an aliased
register.
The new algorithm for register allocation is quite conservative and may
run out of registers before necessary. On the plus side, It Just Works.
Pairing is done whenever possible, and in more cases than before, so
in practice this change should be a net win.
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Making modifications while the editor spawned by git-commit was suspended
didn't have the intended effect.
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Remove superfluous _mesa_resize_framebuffer call which is now harmful because
it causes the third renderbuffer to have width/height 0, so Mesa refuses to
render to it.
In the long term, it would be nice to remove the hack in
intel_alloc_window_storage in favour of a proper Mesa interface for flipping
between more than two colour buffers.
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choose the right mesa texformat for FXT1 & S3TC
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