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path: root/src/mesa/drivers/dri
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2010-02-25i965: Fix up the VF stats packet header.Eric Anholt
2010-02-25i965: Set the state base address on Sandybridge.Eric Anholt
2010-02-25i965: Free gen6 state BOs on context destroy.Eric Anholt
2010-02-25i965: Giant pile of flushing to track down SNB bringup issues.Eric Anholt
This should go away before we push the code.
2010-02-25i965: Fix some defines of gen6 regs from docs comparison.Eric Anholt
2010-02-25i965: Add basic decode of new gen6 packet boundaries.Eric Anholt
2010-02-25i965: Reconnect the index/vertex setup.Eric Anholt
2010-02-25i965: Set up the SNB URB.Eric Anholt
even with vs disabled, still doesn't work.
2010-02-25i965: Try sending prims down the pipeline.Eric Anholt
Now things catch on fire.
2010-02-25i965: Try uploading SNB VS constants.Eric Anholt
2010-02-25i965: Try turning on the VS.Eric Anholt
2010-02-25i965: Get vp-tri batchbuffers running (no rendering).Eric Anholt
2010-02-25i965: Add untested REJECT_ALL clip state.Eric Anholt
2010-02-25i965: Add untested passthrough GS setup.Eric Anholt
2010-02-25i965: Add untested Sandybridge passthrough VS setup.Eric Anholt
2010-02-25i965: Start adding support for the Sandybridge CC unit.Eric Anholt
2010-02-25i965: Set up sandybridge binding table pointers but don't enable it yet.Eric Anholt
It hangs the GPU at the clipper stage, presumably because we're lacking other setup.
2010-02-25i965: Update WM surface state setup for sandybridge's new BLEND_STATE.Eric Anholt
2010-02-25i965: Set up sandybridge depthbuffer.Eric Anholt
2010-02-25intel: Start adding defines and some bits for sandybridge bringup.Eric Anholt
2010-02-25dri/nouveau: Use the XRGB8888 hardware texture format.Francisco Jerez
2010-02-25dri/nouveau: Use the hardware I8 format for intensity textures.Francisco Jerez
2010-02-25dri/nouveau: Implement EXT_texture_from_pixmap.Francisco Jerez
2010-02-25dri/nouveau: Support rectangle textures.Francisco Jerez
2010-02-25dri/nouveau: Don't try to map a non-existent teximage.Francisco Jerez
2010-02-25dri/nouveau: Add some RGB888 span functions.Francisco Jerez
2010-02-25dri/nouveau: Fake A8 and L8 texture support on nv04.Francisco Jerez
2010-02-25dri/nouveau: Restructure the nv[12]0 regcombiner code, and fake A8/L8 support.Francisco Jerez
2010-02-25dri/nouveau: Try to validate textures earlier.Francisco Jerez
2010-02-25dri/nouveau: Swizzle using the CPU when we hit a limitation of SIFM.Francisco Jerez
2010-02-25dri/nouveau: Clean up the nv04 surface code a bit.Francisco Jerez
2010-02-25dri/nouveau: Avoid mask overflow on nv04_surface_fill.Francisco Jerez
2010-02-25dri/nouveau: Set _BaseFormat correctly for z24s8 renderbuffers.Francisco Jerez
2010-02-25dri/nouveau: Fix stencil mask handling on glClear().Francisco Jerez
2010-02-24dri: remove old assertion (see bug 26734)Brian Paul
(cherry picked from commit 293f4d51b473783d5c5ab773a1c438e0a2fe46f2)
2010-02-24intel: Implement GL_OES_EGL_image entrypointsKristian Høgsberg
2010-02-24intel: Implement DRI image extensionKristian Høgsberg
2010-02-24r600: proper fix for 15601835361e2fdd34b38b265cfc3007749ee24dAlex Deucher
PRE_EMIT_STATE_BUFSZ accounts for the start 3d, idle, cd/db flush not for state. The relocs for CB_COLOR0_FRAG & CB_COLOR0_TILE are part of the render target state.
2010-02-24radeon/r200: fix the state emission before kernel clearDave Airlie
this moves the emission outside the lock and adds r200 support. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-02-24r600: Assert that array index is not negative.Vinson Lee
2010-02-24radeon: fix bad state emission causes kernel to do bad depth clearDave Airlie
The kernel lets you clear depth without getting a depth offset from userspace, mesa used to emit state before clear, but that got lost in the refactoring, which made the kernel bug show up. Fix mesa driver to emit the state properly now. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-02-23intel: Call intel_prepare_render() in intelMakeCurrent()Kristian Høgsberg
This restores old behaviour, where we end up doing a DRI2GetBuffers() call from intelMakeCurrent(). The idea was that we could do this lazily, just before we start rendering. However, if we don't do the DRI2GetBuffers() round-trip we don't get the drawable size and higher level mesa ends up short-cutting a number of GL calls, such as glClear().
2010-02-23i965: Enable GL_ARB_fragment_coord_conventions now that the GLSL is fixed.Eric Anholt
Tested with piglit glsl-arb-fragment-coord-conventions.
2010-02-22intel: assert that we do not overflow the batch buffer.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-02-22i915: Fix logic !gen >= 3Chris Wilson
The effect of this was that all objects were aligned to 128 bytes on all generations, rather than just gen2. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-02-22i915: Remove superfluous MI_NOOP from vertex emissionChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-02-22intel: Check that we have a bufmgr or bail out when initializing the context.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-02-20radeon: Silence compiler format warning.Vinson Lee
2010-02-20gamma: Silence uninitialized variable warnings.Vinson Lee
2010-02-20gamma: Add missing headers.Vinson Lee
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