Age | Commit message (Collapse) | Author |
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Fixes this GCC warning on linux-x86 build.
radeon_pair_regalloc.c: In function ‘rc_pair_regalloc_inputs_only’:
radeon_pair_regalloc.c:330: warning: ISO C90 forbids mixed declarations and code
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Fixes these GCC warnings on linux-x86 build.
radeon_pair_schedule.c: In function ‘emit_all_tex’:
radeon_pair_schedule.c:244: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘destructive_merge_instructions’:
radeon_pair_schedule.c:291: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c:438: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘scan_read’:
radeon_pair_schedule.c:619: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘scan_write’:
radeon_pair_schedule.c:645: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘schedule_block’:
radeon_pair_schedule.c:673: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘rc_pair_schedule’:
radeon_pair_schedule.c:730: warning: ISO C90 forbids mixed declarations and code
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Fixes these GCC warnings on linux-x86 build.
radeon_pair_translate.c: In function ‘set_pair_instruction’:
radeon_pair_translate.c:153: warning: ISO C90 forbids mixed declarations and code
radeon_pair_translate.c:170: warning: ISO C90 forbids mixed declarations and code
radeon_pair_translate.c: In function ‘rc_pair_translate’:
radeon_pair_translate.c:336: warning: ISO C90 forbids mixed declarations and code
radeon_pair_translate.c:341: warning: ISO C90 forbids mixed declarations and code
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Fixes these GCC warnings on linux-x86 build.
radeon_program_alu.c: In function ‘r300_transform_trig_simple’:
radeon_program_alu.c:882: warning: ISO C90 forbids mixed declarations and code
radeon_program_alu.c:932: warning: ISO C90 forbids mixed declarations and code
radeon_program_alu.c: In function ‘radeonTransformTrigScale’:
radeon_program_alu.c:996: warning: ISO C90 forbids mixed declarations and code
radeon_program_alu.c: In function ‘r300_transform_trig_scale_vertex’:
radeon_program_alu.c:1033: warning: ISO C90 forbids mixed declarations and code
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Fixes this GCC warning on linux-x86 build.
radeon_emulate_loops.c: In function ‘rc_emulate_loops’:
radeon_emulate_loops.c:517: warning: ISO C90 forbids mixed declarations and code
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Fixes these GCC warnings with linux-x86 build.
radeon_emulate_branches.c: In function ‘handle_if’:
radeon_emulate_branches.c:65: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c:71: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c: In function ‘handle_else’:
radeon_emulate_branches.c:94: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c: In function ‘handle_endif’:
radeon_emulate_branches.c:201: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c: In function ‘fix_output_writes’:
radeon_emulate_branches.c:267: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c:284: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c: In function ‘rc_emulate_branches’:
radeon_emulate_branches.c:307: warning: ISO C90 forbids mixed declarations and code
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This reverts commit 0a1910c26760762eb8d67f68dfd87494ab479e38.
oops, shouldn't apply tiling depth buffer for other chips as well.
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https://bugs.freedesktop.org/show_bug.cgi?id=30415
NOTE: This is a candidate for the 7.9 branch.
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https://bugs.freedesktop.org/show_bug.cgi?id=30416
NOTE: This is a candidate for the 7.9 branch.
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https://bugs.freedesktop.org/show_bug.cgi?id=30415
NOTE: This is a candidate for the 7.9 branch.
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Until we fixed GS hang issue.
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Sandybridge only support tiling depth buffer, always set tiling bit.
Fix 'fbo_firecube' demo.
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Fixes 8 piglit tests.
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The deleted code was meant to be handling indexing of a matrix, which
would have been a noop if it had been correct.
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Fixes:
glsl-fs-varying-array
glsl-texcoord-array
glsl-texcoord-array-2
glsl-vs-varying-array
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Fixes:
glsl-array-varying-01
glsl-vs-mat-add-1
glsl-vs-mat-div-1
glsl-vs-mat-div-2
glsl-vs-mat-mul-2
glsl-vs-mat-mul-3
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Fixes:
glsl-arb-frag-coord-conventions
glsl-fs-fragcoord
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Fixes:
glsl1-discard statement in for loop
glsl-fs-loop-two-counter-02
glsl-fs-loop-two-counter-04
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Fixes these tests using gl_FragData or just gl_FragDepth:
glsl1-Preprocessor test (extension test 1)
glsl1-Preprocessor test (extension test 2)
glsl-bug-22603
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This is the first time these payload bits have made sense to me,
outside of brw_wm_pass* structure.
Fixes: glsl1-gl_FragDepth writing
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+10 piglits
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Fixes 7 piglit cases.
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Fixes:
glsl1-gl_FrontFacing var (1)
glsl1-gl_FrontFacing var (2)
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I confused the array sizing for number of files for the number of regs
in a file.
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This apparently had never been tested elsewhere before being merged to
master.
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Fixes 16 piglit cases.
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Fixes: glsl1-struct(2)
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We don't set the type on the array virtual reg as a whole, so here's
the right place.
Fixes:
glsl1-GLSL 1.20 arrays
glsl1-temp array with constant indexing, fragment shader
glsl1-temp array with swizzled variable indexing
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We need to re-run channel expressions afterwards as it generates new
vector expressions, and we need to successfully support conditional
assignment (brw_CMP takes 2 operands, not 1).
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While much of this we will want to support natively, this should make
the task of reaching the Mesa IR backend's quality easier.
Fixes:
glsl-fs-main-return.
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Fixes:
glsl-fs-if-nested-loop.
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Fixes:
glsl1-Negation
glsl1-Negation2
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Need to bring back correct fb write with header to set pixel
write mask. Fallback for now.
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Fix pipe control command for depth stall and PS_DEPTH_COUNT write.
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Need to set point sprite function in fixed SF state now on sandybridge.
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Fix incorrect scissor rect struct and missed scissor state pointer
setting for sandybridge.
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Depth offset function is moved to SF stage on sandybridge.
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Sandybridge doesn't have Xstart/Ystart in payload header.
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Until we fixed SIMD16 kernel, force to SIMD8 on sandybridge now.
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Must issue a pipe control with any non-zero post sync op before
write cache flush = 1 pipe control.
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Sandybridge's PS constant buffer payload size is decided from
push const buffer command, incorrect size would cause wrong data
in payload for position and vertex attributes. This fixes coefficients
for tex2d/tex3d.
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Sandybridge has not much change on texture sampler with Ironlake.
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Jump count is for 64bit long each, so one instruction requires 2
like on Ironlake.
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Until conditional instructions were fixed, use SPF mode instead for now.
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Sandybridge's VF would convert quads to polygon which not required
for GS then. Current GS state still would cause hang on lineloop.
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