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2009-11-14radeon: return false on texture validation if texture isn't completeMaciej Cencora
2009-11-14radeon: rework mipmap treeMaciej Cencora
2009-11-14radeon: more texture code refactoringMaciej Cencora
2009-11-14radeon: minor refactoring of texture codeMaciej Cencora
Also properly set dstImageOffsets for TexSubImage case.
2009-11-14radeon: rework mipmap tree reference countingMaciej Cencora
2009-11-14r300: fix regression introduced in 1d5a06a1f7812c055db1d724e40d21a0e3686dd1Maciej Cencora
Spotted by Dave Airlie
2009-11-14radeon: use radeon_bo_is_referenced_by_cs for query objectsMaciej Cencora
2009-11-14radeon/r300: don't flush cmdbuf if not necessaryMaciej Cencora
2009-11-14radeon/r300: no need to flush the cmdbuf when changing scissors state in KMM ↵Maciej Cencora
mode
2009-11-14radeon: fix glBufferSubDataMaciej Cencora
2009-11-14radeon: add radeon_bo_is_referenced_by_cs functionMaciej Cencora
2009-11-14radeon: remove unnecessary call to radeonEmitStateMaciej Cencora
fixes bo space accounting errors
2009-11-14r300: add missing texformatMaciej Cencora
2009-11-14r300: remove unneeded includesMaciej Cencora
2009-11-11r300, r300g: Add missing registers.Corbin Simpson
2009-11-10Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt
2009-11-10i965: avoid memsetting all the BRW_WM_MAX_INSN arrays for every compile.Eric Anholt
For an app that's blowing out the state cache, like sauerbraten, the memset of the giant arrays ended up taking 11% of the CPU even when only a "few" of the entries got used. With this, the WM program compile drops back down to 1% of CPU time. Bug #24981 (bisected to BRW_WM_MAX_INSN increase).
2009-11-10i965: Add a note explaining the data cache domain.Eric Anholt
2009-11-10i965: Fix VS constant buffer value loading.Eric Anholt
Previously, we'd load linearly from ParameterValues[0] for the constants, though ParameterValues[1] may not equal ParameterValues[0] + 4. Additionally, the STATE_VAL type paramters didn't get updated. Fixes piglit vp-constant-array-huge.vpfp and ET:QW object locations. Bug #23226.
2009-11-10i965: Unalias src/dst registers for SGE and friends.Eric Anholt
Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/ Bug #22228 (cherry picked from commit 56ab92bad8f1d05bc22b8a8471d5aeb663f220de)
2009-11-10i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt
Fixes piglit arl.vp. (cherry picked from commit d52d78b4bcd6d4c0578f972c0b8ebac09e632196)
2009-11-10i965: Unalias src/dst registers for SGE and friends.Eric Anholt
Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/ Bug #22228
2009-11-10i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt
Fixes piglit arl.vp.
2009-11-09r600/r700: typo, fix mask of DB_ALPHA_TO_MASKJerome Glisse
2009-11-09r600: don't emit htile regsAlex Deucher
These are needed for HiZ which is not currently used and the _BASE reg requires a reloc which is not currently supported in the drm.
2009-11-09r600: rework DB render setupAlex Deucher
- consolidate DB render setup - only enable perfect ZPASS counts and cull disable when OQ is active - enable early Z
2009-11-09r600: don't emit htile regsAlex Deucher
These are needed for HiZ which is not currently used and the _BASE reg requires a reloc which is not currently supported in the drm.
2009-11-09r600: add missing ZPASS setup bits for r7xx+Alex Deucher
2009-11-06i965: Use Compr4 instruction compression mode on G4X and newer.Eric Anholt
No statistically significant performance difference at n=3 with either openarena or my GL demo, but cutting program size seems like a good thing to be doing for the hypothetical app that has a working set near icache size.
2009-11-06i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.cEric Anholt
2009-11-06i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.cEric Anholt
This should fix issues with antialiased lines in GLSL.
2009-11-06i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.cEric Anholt
The PINTERP code should be faster for brw_wm_glsl.c now since brw_wm_emit.c's had been improved, and pixel_w should no longer stomp on a neighbor to dst.
2009-11-06i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt
2009-11-06i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt
2009-11-06i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.cEric Anholt
2009-11-06i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.cEric Anholt
2009-11-06i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code.Eric Anholt
2009-11-06i965: Use a normal alu1 emit for OPCODE_TRUNC.Eric Anholt
2009-11-06i965: Share basic ALU ops between brw_wm_glsl and brw_wm_emit.cEric Anholt
This drops support for get_src_reg_imm in these, but the prospect of getting brw_wm_pass*.c onto our GLSL path is well worth some temporary pain.
2009-11-06i965: Collect GLSL src/dst regs up in generic code.Eric Anholt
This matches brw_wm_emit.c, which we'll be using shortly. There's a possible penalty here in that we'll allocate registers for unused channels, since we aren't doing ref tracking like brw_wm_pass*.c does. However, my measurements on GM965 don't show any for either OA or UT2004 with the GLSL path forced.
2009-11-06intel: better front color buffer test in intelClear()Brian Paul
2009-11-06i965: Always pass the size argument to brw_cache_data.Eric Anholt
This keeps the individual state files from having to export their structures for brw_state_cache initialization.
2009-11-06intel: Finish removing the fallback code for bug #16697.Eric Anholt
I fixed it properly as of 7216679c1998b49ff5b08e6b43f8d5779415bf54.
2009-11-06intel: Don't validate in a texture image used as a render target.Eric Anholt
Otherwise, we could lose track of rendering to that image, which could easily happen during mipmap generation.
2009-11-06intel: Clean up some extra struct indirection in finalize.Eric Anholt
2009-11-06intel: Use _mesa_get_current_tex_object() to clean up TFP path.Eric Anholt
2009-11-06intel: Remove duplicated arguments from intel_miptree_match_image().Eric Anholt
2009-11-06i965: Remove an XXX comment for testing some code that seems to work.Eric Anholt
2009-11-06intel: Remove obsolete comment about GEM in the spans code.Eric Anholt
2009-11-06intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing.Eric Anholt
This should do all the things that MI_FLUSH did, but it can be pipelined so that further rendering isn't blocked on the flush completion unless necessary.
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