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Passes piglit glsl-vs-loop testcase.
Bug #20171
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Conflicts:
src/mesa/shader/lex.yy.c
src/mesa/shader/program_parse.tab.c
src/mesa/shader/program_parse.tab.h
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dma_bo varaible is only used for iterating so allocating memory for it only
causes memory leaks.
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It doesn't work reliably even when all the prerequisite checks are made.
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One of the conflicst from this merge was missed:
commit 0c309bb494b6ee1c403442d1207743f749f95b6e
Merge: c6c44bf d27d659
Author: Brian Paul <brianp@vmware.com>
Date: Wed Sep 9 08:33:39 2009 -0600
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Conflicts:
src/mesa/drivers/dri/intel/intel_context.c
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This was a regression in 0f328c90dbc893e15005f2ab441d309c1c176245.
Bug #23688
Bug #23254
(cherry picked from commit 5604b27b9326ac542069a49ed9650c4b0d3e939a)
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Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Hopefully this will be one of the last cherry-picks.
(cherry picked from commit ca246dd186f9590f6d67038832faceb522138c20)
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This broke BlitFramebufferEXT(GL_DEPTH_BUFFER_BIT).
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Variadic functions can't be inlined which makes debugging to have quite large
function overead. Only aleternative method is to use variadic macros which are
inlined so compiler can optimize debugging to minimize overhead.
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This was a regression in 0f328c90dbc893e15005f2ab441d309c1c176245.
Bug #23688
Bug #23254
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noticed by taiu on IRC.
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Conflicts:
Makefile
configs/default
progs/glsl/Makefile
src/gallium/auxiliary/util/u_simple_shaders.c
src/gallium/state_trackers/glx/xlib/xm_api.c
src/mesa/drivers/dri/i965/brw_draw_upload.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/intel/intel_context.h
src/mesa/drivers/dri/intel/intel_pixel.c
src/mesa/drivers/dri/intel/intel_pixel_read.c
src/mesa/main/texenvprogram.c
src/mesa/main/version.h
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We use t->bo for dri1 since r600 uses CS for dri1.
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Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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if we have a BO here it means TFP and we should have set it
up already.
tested by b0le on #radeon
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On the 965, we just drop the value into the primitive packet. On non-945,
we rely on the sw tnl code handling it.
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The wording of these two is exactly the same, except for the issue
"Can fragments with wc<=0 be generated when this extension is supported?",
which idr thinks is a non-issue for us.
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This currently doesn't include fixing up the cliptests in the assembly
paths to support ARB_depth_clamp, so enabling depth_clamp forces the C path.
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For drawing to lower mipmap levels, the region size makes the renderbuffer
be the size of the lowest level, instead of the current level. On DRI1,
Brian previously found that the RB size was incorrect, so leave this broken
there.
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This reverts commit e0ec405a9fa6fbc1cf2ac531ed5efd1a64e01f18.
This is already available in INTEL_DEBUG=bufmgr in the environment.
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Also, remove unneeded call to _mesa_validate_pbo_access(). It's done by
core Mesa as the comment suggested.
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Conflicts:
src/gallium/drivers/r300/r300_tgsi_to_rc.c
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This replaces the old NQSSADCE code with the same functionality, but quite
different design. Instead of doing a single integerated pass, we now build
explicit data structures representing the dataflow.
This will enable analysis of flow control instruction, and could potentially
open an avenue for several dataflow based optimizations, such as peephole
optimization, fusing MUL+ADD to MAD, and so on.
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(cherry picked from commit c80ce5ac90b1e0ac7a72cd41c314aa2000bfecf5)
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(cherry picked from commit df70d3049a396af3601d2a1747770635a74120bb)
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We could have mapped the wrong set of draw buffers. Noticed while looking
into a DRI2 glean ReadPixels issue.
(cherry picked from commit afc981ee46791838f3cb83e11eb33938aa3efc83)
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(cherry picked from commit dcfe0d66bfff9a55741aee298b7ffb051a48f0d3)
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This should help with things like lightsmark, but I don't have a testcase
for this commit.
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