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this makes glxgears get its background back when running under DRI2
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It doesn't have to do anything. See comments for more details.
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We can't render into any texture format; only certain formats.
Check that render-to-texture's format is renderable in the
intel_validate_framebuffer()
There seems to be a bug somewhere that causes rendering to rgb565 textures
to be corrupted so disallow that for now. This will be revisted.
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Be a little more specific about what these are.
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This doesn't seem to really effect anything but seeing width=0 in drawing
regions was confusing.
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The i965 driver needs an extra instruction field for color output information.
It was using the Sampler field for this. Use the Aux field instead. This
will probaby be revisited at some point...
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It is possible that an object whose vertices all are outside of a
view plane is passed to clip thread due to the RHW workaround. This
object should be rejected by clip thread. Fix bug #19879
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While it's a nice idea to be able to allow clients to choose a smaller
(or bigger for 16bpp screens!) depth size, right now DRI2 hands back a buffer
with a size that matches the drawable, rather than being based off of the
visual. This led to problems in readback as parts of the driver disagreed
on what format the depth buffer was really in.
Fixes the remainder of bug #19447.
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It seems that in this case the Mesa code is handing us x8z24 values instead
of z24s8 values, so we need to not do the rotation. Fixes half of OGLconform
depthrange.c.
Bug #19447.
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This is insanity, but so is copying the same blocks containing the actual
interesting code in the file three times each for the different tile formats.
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I was lured into a false sense of security by the fact that the spans code was
already there, and a bunch of tests didn't catch the problem. oglconform's
mask.c did, though.
Bug #19970.
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This removes the use of the sarea for this stuff so makes DRI2 easier
and emits the CB/ZB info in the correct place
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Flush the VAP the first time for each state atom we upload new
VAP data
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For some reason flushs caused by this CS needs flush hook,
caused the chip to lockup on r300 under compiz, whereas
the F10 driver was rock solid.
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This is similiar to the code from the F10 r300 bufmgr
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When doing line stipple, the stipple count resets on each line segment,
unless the primitive is a GL_LINE_LOOP or a GL_LINE_STRIP.
The existing code correctly identifies the need for a software fallback
to handle conformant line stipple on GL_LINE_LOOP primitives, but
neglects to make the same assessment on GL_LINE_STRIP primitives.
This fixes it so they match.
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Reported by cjb via tinderbox on irc
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Use loops to consolidate lots of texture object code.
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New gl_texgen struct allows quite a bit of code reduction.
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The intelImage also holds a reference to the miptree, so unref that as well.
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This lets us avoid allocing new buffers for renderbuffers, finalized miptrees,
and PBO-uploaded textures when there's an unreferenced but still active one
cached, while also avoiding CPU waits for batchbuffers and CPU-uploaded
textures. The size of BOs allocated for a desktop running current GL
cairogears on i915 is cut in half with this.
Note that this means we require libdrm 2.4.5.
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We were asking for something illegal (write_domain != 0 && read_domains !=
write_domain) because at the time of writing the region surfaces were used
for texturing occasionally as well, and we weren't really clear on the model
GEM was going to use.
This reliably triggered a kernel bug with domain handling, resulting in
oglconform mustpass.c failure. Of course, it only became visible after
01bc4d441fd6821ad9fc20d5e9544e4e587e4ff0 cleaned up some gratuitous flushing.
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GLSL shadow() sampler calls are properly propogated down to the driver now.
The glean glsl1 shadow() tests work (except for the alpha channel).
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Note that I24X8 vs. A24X8 vs. L24X8 doesn't seem to make any difference
for texture/shadow compare, however.
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