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path: root/src/mesa/drivers/dri
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2010-11-19glsl: Add ir_unop_sin_reduced and ir_unop_cos_reducedIan Romanick
The operate just like ir_unop_sin and ir_unop_cos except that they expect their inputs to be limited to the range [-pi, pi]. Several GPUs require this limited range for their sine and cosine instructions, so having these as operations (along with a to-be-written lowering pass) helps this architectures. These new operations also matche the semantics of the GL_ARB_fragment_program SCS instruction. Having these as operations helps in generating GLSL IR directly from assembly fragment programs.
2010-11-19dri/nouveau: Clean up magic numbers in get_rt_formatViktor Novotný
Signed-off-by: Viktor Novotný <noviktor@seznam.cz> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2010-11-18mesa: pass gl_format to _mesa_init_teximage_fields()Brian Paul
This should prevent the field going unset in the future. See bug http://bugs.freedesktop.org/show_bug.cgi?id=31544 for background. Also remove unneeded calls to clear_teximage_fields(). Finally, call _mesa_set_fetch_functions() from the _mesa_init_teximage_fields() function so callers have one less thing to worry about.
2010-11-18i965: Eliminate dead code more aggressively.Eric Anholt
If an instruction writes reg but nothing later uses it, then we don't need to bother doing it. Before, we were just killing code that was never read after it was ever written. This removes many interpolation instructions for attributes with only a few comopnents used. Improves nexuiz high-settings performance .46% +/- .12% (n=3) on my Ironlake.
2010-11-18i965: Fail on loops on gen6 for now until we write the EU emit code for it.Eric Anholt
2010-11-18i965: Add dumping of the sampler default color.Eric Anholt
2010-11-18i965: Add state dumping for sampler state.Eric Anholt
2010-11-18i965: Shut up spurious gcc warning about GLSL_TYPE enums.Eric Anholt
2010-11-17glsl: Remove the ir_binop_cross opcode.Kenneth Graunke
2010-11-17r600c/evergreen: texture align is group_bytes just like 6xx/7xxAlex Deucher
Default group bytes to 512 on evergreen. Don't query tiling config yet for evergreen, the current info returned is not adequate for evergreen (no way to get bank info).
2010-11-15r600: Evergreen has two extra frac_bits for the sampler LOD state.Henri Verbeet
Note: this is a candidate for the 7.9 branch.
2010-11-15dri/nouveau: Kill a bunch of ternary operators.Francisco Jerez
2010-11-15dri/nouveau: Fix typo.Francisco Jerez
2010-11-15dri/nouveau: Remove nouveau_class.h, finishing switch to rules-ng-ng headersViktor Novotný
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2010-11-15dri/nouveau nv20: Use rules-ng-ng headersViktor Novotný
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2010-11-15dri/nouveau: nv10: Use rules-ng-ng headersViktor Novotný
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2010-11-15dri/nouveau: nv04: Use rules-ng-ng headersViktor Novotný
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2010-11-15dri/nouveau: Import headers from rules-ng-ngViktor Novotný
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2010-11-15evergreen: set gl_texture_image::TexFormat field in evergreenSetTexBuffer()Brian Paul
See https://bugs.freedesktop.org/show_bug.cgi?id=31544 Note: this is a candidate for the 7.9 branch.
2010-11-15r300: set gl_texture_image::TexFormat field in r300SetTexBuffer2()Brian Paul
See https://bugs.freedesktop.org/show_bug.cgi?id=31544 Note: this is a candidate for the 7.9 branch
2010-11-15r200: set gl_texture_image::TexFormat field in r200SetTexBuffer2()Brian Paul
See https://bugs.freedesktop.org/show_bug.cgi?id=31544 Note: this is a candidate for the 7.9 branch.
2010-11-15r600: set gl_texture_image::TexFormat field in r600SetTexBuffer2()Brian Paul
See https://bugs.freedesktop.org/show_bug.cgi?id=31544 Note: this is a candidate for the 7.9 branch.
2010-11-15radeon: set gl_texture_image::TexFormat field in radeonSetTexBuffer2()Brian Paul
See https://bugs.freedesktop.org/show_bug.cgi?id=31544 Note: this is a candidate for the 7.9 branch
2010-11-15radeon: fix potential segfault in renderbuffer updateDaniel Lichtenberger
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=31617 Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-11-14i965: Fix gl_FragCoord inversion when drawing to an FBO.Eric Anholt
This showed up as cairo-gl gradients being inverted on everyone but Intel, where I'd apparently tweaked the transformation to work around the bug. Fixes piglit fbo-fragcoord.
2010-11-13i965: Silence uninitialized variable warning.Vinson Lee
Silences this GCC warning. brw_fs.cpp: In member function 'void fs_visitor::split_virtual_grfs()': brw_fs.cpp:2516: warning: unused variable 'reg'
2010-11-11tdfx: s/Format/_BaseFormat/Brian Paul
Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31560
2010-11-11dri/nouveau: Split hardware/software TNL instantiation more cleanly.Francisco Jerez
2010-11-10intel: Add a new B43 pci id.Robert Hooker
Signed-off-by: Robert Hooker <robert.hooker@canonical.com>
2010-11-10i965: re-enable gen6 IF statements in the fragment shader.Eric Anholt
IF statements were getting flattened while they were broken. With Zhenyu's last fix for ENDIF's type, everything appears to have lined up to actually work. This regresses two tests: glsl1-! (not) operator (1, fail) glsl1-! (not) operator (1, pass) but fixes tests that couldn't work before because the IFs couldn't be flattened: glsl-fs-discard-01 occlusion-query-discard (and, naturally, this should be a performance improvement for apps that actually use IF statements to avoid executing a bunch of code).
2010-11-10i965: Work around strangeness in swizzling/masking of gen6 math.Eric Anholt
Sometimes we swizzled in a different channel it looked like, and sometimes we swizzled in zero. Or something. Having looked at the output of another code generator for this chip, this is approximately what they do, too: use align1 math on temporaries, and then move the results into place. Fixes: glean/vp1-EX2 test glean/vp1-EXP test glean/vp1-LG2 test glean/vp1-RCP test (reciprocal) glean/vp1-RSQ test 1 (reciprocal square root) shaders/glsl-cos shaders/glsl-sin shaders/glsl-vs-masked-cos shaders/vpfp-generic/vp-exp-alias
2010-11-10r200: fix r200 large pointsRoland Scheidegger
DD_POINT_SIZE got never set for some time now (as it was set only in ifdefed out code), which caused the r200 driver to use the point primitive mistakenly in some cases which can only do size 1 instead of point sprite. Since the logic to use point instead of point sprite prim is flaky at best anyway (can't work correctly for per-vertex point size), just drop this and always emit point sprites (except for AA points) - reasons why the driver tried to use points for size 1.0 are unknown though it is possible they are faster or more conformant. Note that we can't emit point sprites without point sprite cntl as that might result in undefined point sizes, hence need drm version check (which was unnecessary before as it should always have selected points). An alternative would be to rely on the RE point size clamp controls which could clamp the size to 1.0 min/max even if the SE point size is undefined, but currently always use 0 for min clamp. (As a side note, this also means the driver does not honor the gl spec which mandates points, but not point sprites, with zero size to be rendered as size 1.) This should fix recent reports of https://bugs.freedesktop.org/show_bug.cgi?id=702. This is a candidate for the mesa 7.9 branch.
2010-11-10Revert "i965: VS use SPF mode on sandybridge for now"Zhenyu Wang
This reverts commit 9c39a9fcb2c76897e9b5aff68ce197a411c4e25c. Remove VS SPF mode, conditional instruction works for VS now.
2010-11-10i965: fix dest type of 'endif' on sandybridgeZhenyu Wang
That should also be immediate value for type W.
2010-11-09i965: Add support for math on constants in gen6 brw_wm_glsl.c path.Eric Anholt
Fixes 10 piglit cases that were assertion failing.
2010-11-09i965: Allow OPCODE_SWZ to put immediates in the first arg.Eric Anholt
Fixes assertion failure with texture swizzling in the GLSL path when it's triggered (such as gen6 FF or ARB_fp shadow comparisons). Fixes: texdepth texSwizzle fp1-DST test fp1-LIT test 3
2010-11-09intel: Add assert check for blitting alignment.Peter Clifton
Also fixup code comment to reflect that the GPU requires DWORD alignment, but in this case does not actually pass the value "in DWORDs" as I previously stated.
2010-11-09Revert "intel: Fix the client-side swapbuffers throttling."Eric Anholt
This reverts commit 76360d6abc9e0195bc5c373101ae616e68b2e6e6. On second thought, it turned out that sync objects also used the wait_rendering API like this, and would need the same treatment, and so wait_rendering itself is fixed in libdrm now.
2010-11-09intel: Fix the client-side swapbuffers throttling.Eric Anholt
We were asking for a wait to GTT read (all GPU rendering to it complete), instead of asking for all GPU reading from it to be complete. Prevents swapbuffers-based apps from running away with rendering, and produces a better input experience.
2010-11-08radeon: Implement GL_OES_EGL_imageJohann Rudloff
agd5f: add support to radeon/r200/r300 as well
2010-11-08radeon: Implement __DRI_IMAGE and EGL_MESA_image_drmJohann Rudloff
2010-11-08radeon: Implement EGL_MESA_no_surface_extensionJohann Rudloff
2010-11-08mesa/r300classic: Fix dri2Invalidate/radeon_prepare_render for page flipping.Mario Kleiner
A call to radeon_prepare_render() at the beginning of draw operations was placed too deep in the call chain, inside r300RunRenderPrimitive(), instead of r300DrawPrims() where it belongs. This leads to emission of stale target color renderbuffer into the cs if bufferswaps via page-flipping are used, and thereby causes massive rendering corruption due to unsynchronized rendering into the active frontbuffer. This patch fixes such problems for use with the upcoming radeon page-flipping patches. Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
2010-11-08intel: Fix emit_linear_blit to use DWORD aligned width blitsPeter Clifton
The width of the 2D blits used to copy the data is defined as a 16-bit signed integer, but the pitch must be DWORD aligned. Limit to an integral number of DWORDs, (1 << 15 - 4) rather than (1 << 15 -1). Fixes corruption to data uploaded with glBufferSubData. Signed-off-by: Peter Clifton <pcjc2@cam.ac.uk>
2010-11-08r600c: properly align mipmaps to group sizeAlex Deucher
fixes: https://bugs.freedesktop.org/show_bug.cgi?id=31400
2010-11-04i965: Silence uninitialized variable warning.Vinson Lee
Silences this GCC warning. brw_wm_fp.c: In function 'brw_wm_pass_fp': brw_wm_fp.c:966: warning: 'last_inst' may be used uninitialized in this function brw_wm_fp.c:966: note: 'last_inst' was declared here
2010-11-04i965: Silence uninitialized variable warning.Vinson Lee
Silences this GCC warning. brw_wm_fp.c: In function 'precalc_tex': brw_wm_fp.c:666: warning: 'tmpcoord.Index' may be used uninitialized in this function
2010-11-04r300/compiler: Move declaration before code.Vinson Lee
Fixes this GCC warning with linux-x86 build. radeon_dataflow.c: In function 'get_readers_normal_read_callback': radeon_dataflow.c:472: warning: ISO C90 forbids mixed declarations and code
2010-11-04r300/compiler: Move declaration before code.Vinson Lee
Fixes this GCC warning with linux-x86 build. radeon_pair_schedule.c: In function 'merge_presub_sources': radeon_pair_schedule.c:312: warning: ISO C90 forbids mixed declarations and code
2010-11-03dri/nouveau: Silence uninitialized variable warning.Vinson Lee
Fixes this GCC warning. nouveau_vbo_t.c: In function 'nv10_vbo_render_prims': nouveau_render_t.c:161: warning: 'max_out' may be used uninitialized in this function nouveau_render_t.c:161: note: 'max_out' was declared here
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