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path: root/src/mesa/drivers/dri
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2008-02-12[intel] Fix type of some more flags variables for uint64_t flags.Eric Anholt
Harmless since we don't yet have any bits above 31 for flags.
2008-02-12[intel] Note when BO map/unmap fail with TTM.Eric Anholt
2008-02-12[intel] Fix INTEL_DEBUG=bufmgr after relocation interface fixups.Eric Anholt
2008-02-12[965] Remove stale brw_state_cache.c comment and function export.Eric Anholt
2008-02-12nouveau: ddx versioning changedBen Skeggs
2008-02-07[965] Flush icache on new batch, not just new context.Eric Anholt
This is required since our buffer manager may now move our instruction-containing buffers at any batchbuffer emit.
2008-02-06[915] Fix COS function using same plan as SIN.Eric Anholt
The previous COS function failed badly outside of [-pi/2, pi/2].
2008-02-06[915] Use a quartic term to improve the accuracy of SIN results.Eric Anholt
This is described in the link in the comment, and is the same technique that r300 uses.
2008-02-06[915] Fix fp SIN function, and use a quadratic approximation instead of Taylor.Eric Anholt
The Taylor series notably fails at producing sin(pi) == 0, which leads to discontinuity every 2*pi. The quadratic gets us sin(pi) == 0 behavior, at the expense of going from 2.4% THD with working Taylor series to 3.8% THD (easily seen on comparative graphs of the two). However, our previous implementation was producing sin(pi) < -1 and worse, so any reasonable approximation is an improvement. This also fixes the repeating behavior, where the previous implementation would repeat sin(x) for x>pi as sin(x % pi) and the opposite for x < -pi.
2008-02-05[965] Bug 14314: assertion failure with with !AIGLX and depth=24 visual.Eric Anholt
2008-02-05[965] Fix TTM relocation caching overzealousness.Eric Anholt
The failure mode that was a available was: reloc 1 -> target_buf exec: PRESUMED_OFFSET wrong, buffer migrates, r1 entry updated. reloc 2 -> target_buf exec: suppose buffer migrates again. PRESUMED_OFFSET wrong. r2 entry updated. reloc 1 -> target_buf exec: suppose buffer doesn't migrate. PRESUMED_OFFSET right. no relocations performed. r1 has stale pointer at original location. Failures were reported with OGLconform's VBO test and SPECviewperf90, though I haven't confirmed that this fixes it.
2008-02-05i965: adjust the byte order of clear color. fix #14165Xiang, Haihao
2008-02-04Replace usage of DRM_BO_FLAG_MEM_TT in intel_regions.c with local/cached.Eric Anholt
In addition to potentially binding when it was about to be mapped anyway, failure to use CACHED_MAPPED means eating a full wbinvd on validate. Thanks to airlied for catching this.
2008-02-04[965] Convert brw_draw_upload to managing dri_bos, not gl_buffer_objects.Eric Anholt
This helps us avoid a bunch of mess with gl_client_arrays that we filled with unused data and confused readers.
2008-02-04[965] Remove dead structure in brw_draw_upload.c.Eric Anholt
2008-02-04[965] Move temporary vbo array storage into the function using it.Eric Anholt
2008-02-04[965] Remove dead brw_vertex_element members.Eric Anholt
2008-02-04[965] Add a wrapper around interleaved copy_array_to_vbo_array for profiling.Eric Anholt
If compiled with optimization, it shouldn't appear at all, and helps me for now.
2008-02-04[965] Avoid overloaded use of the term 'input' for clarity.Eric Anholt
2008-02-04[965] Replace VEP/VBP state structures with inline batch emits.Eric Anholt
2008-02-04r300: fix isosurf on rs690Dave Airlie
2008-02-03i965: fix potential NULL pointer dereference. The third regionXiang, Haihao
isn't created at all for 965
2008-02-01[965] Fix indentation.Eric Anholt
2008-02-01Revert "intel: don't apply the relocation optimization if a target"Eric Anholt
This reverts commit e2cb905bc6e23eaafaeeb2abdc9480e70959ee3f. It was a reversion of an optimization hidden as otherwise. pre_target_buf_handle was always NULL, so the optimization was never enabled, rather than fixing the important optimization (resulting in 25-50% performance loss).
2008-02-01[965] Replace XXX comment about constant swizzle with an assert.Eric Anholt
2008-02-01[965] Fix some indentation in brw_vs_tnl.c.Eric Anholt
2008-02-01 [intel] fix for previous fixZou Nan hai
2008-02-01 [intel] use _mesa_copy_rect for upload compressed texture,Zou Nan hai
this fix bad texture issue in some games(UT and quake).
2008-02-01i965: Don't emit state if fall back to software rendering. fix #14116Xiang, Haihao
2008-01-31[i965] renable regative rhw testZou Nan hai
2008-01-31intel: don't apply the relocation optimization if a targetXiang, Haihao
buffer is used for a relocatee in the former relocation process then another target buffer is used for this relocatee at the same offset in the current relocation process.
2008-01-29Add new RV380 pci idAlex Deucher
bug 14289
2008-01-29i965: new integrated graphics chipset supportXiang, Haihao
2008-01-27r300: add initial rs690 support to MesaDave Airlie
The rs690 has an rs4xx style vertex-shader less 3D engine. It uses the new r500 output engine though. It also needs a new drm with rs690 support, which is just getting cleaned up.
2008-01-25i965: valid message length includes message header.Xiang, Haihao
2008-01-25i965: re-define the type of reg.loopcount.Xiang, Haihao
avoid some issues such that 1 + (-2) gets a big positive value.
2008-01-24Bufmgr cleanup from intel-batchbuffer branch of 2d driver.Eric Anholt
2008-01-24Clean up comments/dead code from relocation buffer change.Eric Anholt
2008-01-24i915: move to using copy from user for relocationsDave Airlie
2008-01-22[intel] Clean up references to screen buffer metrics.Kristian Høgsberg
The screen wide info such as pitch and cpp are obsoleted by the FBO changes, so clean up the last few references to those, except for setting up the legacy screen regions.
2008-01-19[965] Fix WM unit cache keying that broke line stipple and polygon offset.Eric Anholt
2008-01-18[intel] Fix memory leak with fake bufmgr.Eric Anholt
2008-01-18[965] Do a little bit rotation in state hash to reduce collisions.Eric Anholt
This was around 3% improvement in OA.
2008-01-18[intel] Use a static array for the validation list instead of a linked list.Eric Anholt
Around 10% of a CPU was being wasted to create the linked list which we threw out immediately after passing it to the kernel.
2008-01-17[intel] Make the no_rast option be standard driconf instead of INTEL_NO_RAST.Eric Anholt
2008-01-17[i915] Fix driver from cliprects changes, and clean up state emission.Eric Anholt
The fix for pageflipping with cliprects ended up causing a batch flush at an inopportune time, which is fixed by moving it up. Additionally, the recovery code for handling batch wraps at bad times is replaced by just checking for the space up front, and using a no_batch_wrap assert like on 965 to make sure that we weren't wrong about how much space that was.
2008-01-17[965] Fix whitespace in c9b1fef0c9c5018efd825c42782f19ad0618696aEric Anholt
2008-01-17[965] Fix potential segfaults from bad realloc.Eric Anholt
C has no order of evaluation restrictions on function arguments, so we attempted to realloc from new-size to new-size.
2008-01-17i965: always call dri_emit_reloc when creating clip unit stateXiang, Haihao
This fix ensures it gets the starting location of the clip program if a clip unit state is same as a unit which is created when metaops is actived and it doesn't impact metaops because the clip state offset isn't emitted when metaops is actived.
2008-01-16[965] Fix inversion of SLT/SGE results in vertex programs.Eric Anholt
The WM code had this right, so copy its behavior. This reverts a flipping of the arguments to SLT in brw_vs_tnl which came in with the GLSL code that probably occurred to work around the flipped results, and brings the code back in line with t_vp_build.c.
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