Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-08-18 | radeon/r200: fix build after OQ commits | Dave Airlie | |
2009-08-18 | r300: OQ rework | Dave Airlie | |
Move to common code base so radeon/r200 can add support for this. Make OQ start a state emitted like all normal state, and make no-tcl flushing work in proper places. Really need a generic post emit space reservation mechanism like max_state so we can reserve some space for the emit this code passes demos/arbocclude, piglit occlusion query and glean occlusion query with TCL and NO-TCL on my rv530. | |||
2009-08-18 | r300: fix missing BEGIN/END batches | Dave Airlie | |
2009-08-18 | r300: fix big endian build | Dave Airlie | |
2009-08-17 | r600: fix counting error after the last commit | Alex Deucher | |
2009-08-17 | r600: make sure the number of indices is valid | Alex Deucher | |
make sure the number of indices is valid for the requested prim type. glxgears sends invalid quad strips with only 2 indices for example. | |||
2009-08-17 | radeon: remove RADEON_DEBUG_BO stuff | Alex Deucher | |
This stuff was a vestige of the r600 bring up and now mostly serves to periodically break the build. | |||
2009-08-17 | r300: split vbo rendering with big drawarray case | Jerome Glisse | |
Split vbo rendering when the number of elements requested by drawarrays is bigger than 65536. | |||
2009-08-17 | radeon: turn off bo debugging | Dave Airlie | |
2009-08-16 | r300: disable ZTOP only when occlusion queries are used | Maciej Cencora | |
2009-08-15 | r300: enable ARB_occlusion_query | Maciej Cencora | |
Supported only on HW with TCL block and with proper radeon drm. Required minimum radeon drm version is 1.30 or KMS. | |||
2009-08-15 | radeon: add flag for drm OQ support | Maciej Cencora | |
2009-08-15 | r300: temporary occlusion query hack | Maciej Cencora | |
2009-08-15 | r300: clear not_flushed OQ list after flush | Maciej Cencora | |
2009-08-15 | r300/oq: add some debugging info | Maciej Cencora | |
2009-08-15 | r300: add occlusion queries support | Maciej Cencora | |
TODO: - use proper interface for checking if bo is idle when it's available - disable ZTOP only when needed - make it work under KMS | |||
2009-08-15 | radeon space: realign with drm space check code | Dave Airlie | |
2009-08-15 | r300: fixup space checks since VBO code | Dave Airlie | |
Hopefully this gets the ordering correct so the space checks don't fail. | |||
2009-08-15 | r300: add just in case warn I don't think this can actually happen | Dave Airlie | |
2009-08-15 | radeon: enable vertex splitting for IBs | Dave Airlie | |
Based on Maciej's code, just fixed up the alignments for INDX_BUFFER ut2004 runs AS-Convoy | |||
2009-08-15 | i965: disable bounds checking on arrays with stride 0 | Roland Scheidegger | |
if stride is 0 we cannot use count as max index for bounds checking, since the hardware will simply return 0 as data for indices failing bounds check. If stride is 0 any index should be valid hence simply disable bounds checking in this case. This fixes bugs introduced with e643bc5fc7afb563028f5a089ca5e38172af41a8. | |||
2009-08-14 | i965: Add support for GL_ARB_seamless_cube_map | Ian Romanick | |
2009-08-15 | Merge branch 'vbo_clean' | Maciej Cencora | |
Conflicts: src/mesa/drivers/dri/r300/r300_draw.c | |||
2009-08-15 | r300: mark VBO buffer objects as persistent | Maciej Cencora | |
2009-08-14 | r300: unmap buffer objects after usage | Maciej Cencora | |
2009-08-14 | r300: remove broken vertex splitting | Maciej Cencora | |
Revert to previous behaviour of dropping to big render operations. | |||
2009-08-14 | r300: rework index buffer setup | Maciej Cencora | |
Copy elements directly to DMA bo to get rid of one memcpy, and prepare for using VBOs for index buffer. | |||
2009-08-14 | r300: remove unused software TNL path | Maciej Cencora | |
This doesn't remove software TCL path - so RS480 and RS690 work as before. | |||
2009-08-14 | r300: use VBOs for vertex attributes | Maciej Cencora | |
2009-08-14 | intel: in intel_context struct use typedef for sarea struct | Tobias Doerffel | |
Using drm_i915_sarea_t instead of struct drm_i915_sarea seems to be a common standard now, therefore fix it also in intel_context structure. Additionally this silences a compiler warning: intel_swapbuffers.c: In function `intelFixupVblank': intel_swapbuffers.c:48: warning: initialization from incompatible pointer type Signed-off-by: Tobias Doerffel <tobias.doerffel@gmail.com> | |||
2009-08-14 | r300: add required symlinks | Maciej Cencora | |
Reported by adamk on #radeon | |||
2009-08-14 | radeon: handle debug versions of radeon_bo_open | Maciej Cencora | |
2009-08-14 | radeon: add VBO support (not enabled yet) | Maciej Cencora | |
2009-08-14 | radeon: export emitvec* functions | Maciej Cencora | |
2009-08-14 | radeon: constify some parameters | Maciej Cencora | |
2009-08-14 | r600: emit SURFACE_BASE_UPDATE on depth base updates on rv6xx | Alex Deucher | |
2009-08-13 | r600: move non-surface related cb state to general state | Alex Deucher | |
2009-08-13 | r600: move non-surface related depth state to general state | Alex Deucher | |
2009-08-13 | i965: fix cube map on IGDNG | Xiang, Haihao | |
2009-08-12 | Merge branch 'new-frag-attribs' | Brian Paul | |
This branch introduces new FRAG_ATTRIB_FACE and FRAG_ATTRIB_PNTC fragment program inputs for GLSL gl_FrontFacing and gl_PointCoord. Before, these attributes were packed with the FOG attribute. That made things complicated elsewhere. | |||
2009-08-12 | i965: Make the cube mapping RCP use a writemask. | Eric Anholt | |
Fixes cube mapping since the scalar changes. | |||
2009-08-12 | i965: Allocate destination registers for GLSL TEX instructions contiguously. | Eric Anholt | |
This matches brw_wm_pass*.c behavior, and fixes the norsetto shadow demo. Bug #19489 | |||
2009-08-12 | i965: drop dead scalar handling in GLSL. | Eric Anholt | |
2009-08-12 | i965: Correct brw_wm_nr_args for WM_DELTAXY and WM_PIXELXY. | Eric Anholt | |
2009-08-12 | i965: Drop GLSL ABS code, which is translated away in brw_wm_fp. | Eric Anholt | |
2009-08-12 | i965: Drop code for emitting OPCODE_SUB, since brw_wm_fp.c makes it an ADD. | Eric Anholt | |
2009-08-12 | i965: Store the dispatch width in the WM compile struct. | Eric Anholt | |
I'll be using this in merging brw_wm_emit.c and brw_wm_glsl.c | |||
2009-08-12 | i965: Handle scalar result swizzling in shared GLSL/non-GLSL code. | Eric Anholt | |
This is preparation for merging of brw_wm_glsl.c and brw_wm_emit.c, and glsl.c doesn't swizzle channel results around. | |||
2009-08-12 | i965: Flag ARL-using programs as requiring brw_wm_glsl.c | Eric Anholt | |
This doesn't fix the glean testcase, but I guess it provides hope. | |||
2009-08-12 | i965: Remove some unused WM opcode args. | Eric Anholt | |