| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-09-10 | Merge branch 'master' into asm-shader-rework-2 | Ian Romanick | |
| Conflicts: src/mesa/shader/lex.yy.c src/mesa/shader/program_parse.tab.c src/mesa/shader/program_parse.tab.h | |||
| 2009-09-10 | Merge branch 'mesa_7_6_branch' | Brian Paul | |
| 2009-09-10 | intel: disable intel_stencil_drawpixels() for now | Brian Paul | |
| It doesn't work reliably even when all the prerequisite checks are made. | |||
| 2009-09-10 | Fix merge fail | Ian Romanick | |
| One of the conflicst from this merge was missed: commit 0c309bb494b6ee1c403442d1207743f749f95b6e Merge: c6c44bf d27d659 Author: Brian Paul <brianp@vmware.com> Date: Wed Sep 9 08:33:39 2009 -0600 | |||
| 2009-09-10 | mesa: need to set all stencil bits to 0 before setting the 1 bits | Brian Paul | |
| Plus, check for pixel transfer stencil index/offset. | |||
| 2009-09-10 | Merge branch 'mesa_7_5_branch' into mesa_7_6_branch | Ian Romanick | |
| Conflicts: src/mesa/drivers/dri/intel/intel_context.c | |||
| 2009-09-10 | i965: Fix relocation delta for WM surfaces. | Eric Anholt | |
| This was a regression in 0f328c90dbc893e15005f2ab441d309c1c176245. Bug #23688 Bug #23254 (cherry picked from commit 5604b27b9326ac542069a49ed9650c4b0d3e939a) | |||
| 2009-09-10 | intel: add B43 chipset support | Zhenyu Wang | |
| Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Hopefully this will be one of the last cherry-picks. (cherry picked from commit ca246dd186f9590f6d67038832faceb522138c20) | |||
| 2009-09-10 | intel: Don't forget to map the depth read buffer in spans. | Eric Anholt | |
| This broke BlitFramebufferEXT(GL_DEPTH_BUFFER_BIT). | |||
| 2009-09-10 | r300: enable rb3d_discard_src_pixel_lte_threshold for more chips on dri2 | Alex Deucher | |
| 2009-09-10 | r300: add full support for two sided stencil on r5xx for dri2 | Alex Deucher | |
| 2009-09-10 | mesa: fix cut&paste typos | Mathias Frohlich | |
| 2009-09-10 | radeon: Change debugging code to use macros instead of inline functions. | Pauli Nieminen | |
| Variadic functions can't be inlined which makes debugging to have quite large function overead. Only aleternative method is to use variadic macros which are inlined so compiler can optimize debugging to minimize overhead. | |||
| 2009-09-09 | i965: Fix relocation delta for WM surfaces. | Eric Anholt | |
| This was a regression in 0f328c90dbc893e15005f2ab441d309c1c176245. Bug #23688 Bug #23254 | |||
| 2009-09-09 | radeon: Add more verbose error message for failed command buffer. | Pauli Nieminen | |
| 2009-09-09 | i965: fix an overlooked merge conflict | Brian Paul | |
| 2009-09-09 | r600: check if textures are actually enabled before submission | Alex Deucher | |
| noticed by taiu on IRC. | |||
| 2009-09-09 | Merge branch 'mesa_7_6_branch' | Brian Paul | |
| 2009-09-09 | Merge branch 'mesa_7_5_branch' into mesa_7_6_branch | Brian Paul | |
| Conflicts: Makefile configs/default progs/glsl/Makefile src/gallium/auxiliary/util/u_simple_shaders.c src/gallium/state_trackers/glx/xlib/xm_api.c src/mesa/drivers/dri/i965/brw_draw_upload.c src/mesa/drivers/dri/i965/brw_vs_emit.c src/mesa/drivers/dri/intel/intel_context.h src/mesa/drivers/dri/intel/intel_pixel.c src/mesa/drivers/dri/intel/intel_pixel_read.c src/mesa/main/texenvprogram.c src/mesa/main/version.h | |||
| 2009-09-09 | mesa: disable GL_LUMINANCE case in _mesa_meta_draw_pixels() | Brian Paul | |
| Works around a bug found on i965. See bug 23670. | |||
| 2009-09-09 | r600: fix ftp for dri1 | Alex Deucher | |
| We use t->bo for dri1 since r600 uses CS for dri1. | |||
| 2009-09-09 | intel: add B43 chipset support | Zhenyu Wang | |
| Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> | |||
| 2009-09-09 | r600: don't setup hardware state if TFP | Dave Airlie | |
| if we have a BO here it means TFP and we should have set it up already. tested by b0le on #radeon | |||
| 2009-09-08 | intel: Add support for ARB_draw_elements_base_vertex. | Eric Anholt | |
| On the 965, we just drop the value into the primitive packet. On non-945, we rely on the sw tnl code handling it. | |||
| 2009-09-08 | mesa: Add support for ARB_draw_elements_base_vertex. | Eric Anholt | |
| 2009-09-08 | glapi: Add ARB_draw_elements_base_vertex | Eric Anholt | |
| 2009-09-08 | mesa: Expose NV_depth_clamp if ARB_depth_clamp is supported. | Eric Anholt | |
| The wording of these two is exactly the same, except for the issue "Can fragments with wc<=0 be generated when this extension is supported?", which idr thinks is a non-issue for us. | |||
| 2009-09-08 | i965: Add support for ARB_depth_clamp. | Eric Anholt | |
| 2009-09-08 | mesa: Add support for ARB_depth_clamp. | Eric Anholt | |
| This currently doesn't include fixing up the cliptests in the assembly paths to support ARB_depth_clamp, so enabling depth_clamp forces the C path. | |||
| 2009-09-08 | i965: Respect spec requirement for pixel shader computed depth with no zbuffer. | Eric Anholt | |
| 2009-09-08 | i965: Set NULL WM surfaces as tiled according to requirement by specs. | Eric Anholt | |
| 2009-09-08 | i965: Use the renderbuffer surface size instead of region size for WM surfaces. | Eric Anholt | |
| For drawing to lower mipmap levels, the region size makes the renderbuffer be the size of the lowest level, instead of the current level. On DRI1, Brian previously found that the RB size was incorrect, so leave this broken there. | |||
| 2009-09-08 | Revert "intel: helper to debug bufmgr (disabled)" | Eric Anholt | |
| This reverts commit e0ec405a9fa6fbc1cf2ac531ed5efd1a64e01f18. This is already available in INTEL_DEBUG=bufmgr in the environment. | |||
| 2009-09-08 | i965: #include clean-ups | Brian Paul | |
| 2009-09-08 | intel: #include clean-ups | Brian Paul | |
| 2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
| Also, remove unneeded call to _mesa_validate_pbo_access(). It's done by core Mesa as the comment suggested. | |||
| 2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
| 2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
| 2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
| 2009-09-08 | r600: fix dri2 clipping | Alex Deucher | |
| 2009-09-08 | i965: fix incorrect test for vertex position attribute | Brian Paul | |
| 2009-09-06 | mesa: initial version of _mesa_meta_generate_mipmap() | Brian Paul | |
| Incomplete and totally untested. Based on intel_generate_mipmap(). | |||
| 2009-09-06 | xlib: test _mesa_meta_bitmap() | Brian Paul | |
| 2009-09-06 | mesa: use separate temp texture for bitmaps | Brian Paul | |
| 2009-09-06 | mesa: temp_texture changes | Brian Paul | |
| 2009-09-06 | mesa: free meta bitmap buffers | Brian Paul | |
| 2009-09-06 | mesa: use _mesa_set_enable() | Brian Paul | |
| 2009-09-06 | mesa: _mesa_meta_bitmap() function | Brian Paul | |
| 2009-09-06 | xlib: move misplaced brace | Brian Paul | |
| 2009-09-04 | r600: add support for EXT_texture_sRGB | Alex Deucher | |
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index : android-x86-mesa.git | |
| Androïd/x86 port of Mesa drivers | Hugues Hiegel |
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