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path: root/src/mesa/drivers
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2010-12-02i965: add support for polygon mode on Sandybridge.Xiang, Haihao
This fixes some mesa demos such as fslight/engine in wireframe mode.
2010-12-01i965: Add support for loops in the VS.Eric Anholt
This follows the changes done for the FS alongside the EU emit code.
2010-12-01i965: Enable IF statements in the VS.Eric Anholt
While the actual IF instructions were fixed by Zhenyu, we were still flattening them to conditional moves.
2010-12-01i965: Add support for gen6 CONTINUE instruction emit.Eric Anholt
At this point, piglit tests for fragment shader loops are working.
2010-12-01i965: Add support for gen6 BREAK ISA emit.Eric Anholt
There are now two targets: the hop-to-end-of-block target, and the target for where to resume execution for active channels.
2010-12-01i965: Add support for gen6 DO/WHILE ISA emit.Eric Anholt
There's no more DO since there's no more mask stack, and WHILE has been shuffled like IF was.
2010-12-01i965: Dump the WHILE jump distance on gen6.Eric Anholt
2010-12-01i915: Correctly generate unconditional KIL instructionsIan Romanick
Fixes piglit test glsl-fs-discard-03. NOTE: This is a candidate for the 7.9 branch.
2010-12-01i915: Request that POW instructions be loweredIan Romanick
2010-12-01r600c: fix some opcodes on evergreenAlex Deucher
There were a few places where we were using the wrong opcodes on evergreen. arl still needs to be fixed on evergreen; see r600g for reference. NOTE: This is a candidate for the 7.9 branch. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-12-01r300/compiler: implement and lower OPCODE_CLAMPMarek Olšák
Needed for st/vega.
2010-12-01i965: also using align1 mode for math2 on sandybridgeZhenyu Wang
Like Eric's workaround patch of commit 490c23ee6be2e8531b5a14d42f808de83d401130. This forces to align1 mode for math2 too.
2010-11-29i965: Fix type of gl_FragData[] dereference for FB write.Eric Anholt
Fixes glsl-fs-fragdata-1, and hopefully Eve Online where I noticed this bug in the generated shader. Bug #31952.
2010-11-29drivers/x11: unifdef XFree86ServerAdam Jackson
This code was for the old GLcore build of the software rasteriser. The X server switched to a DRI driver for software indirect GLX long ago. Signed-off-by: Adam Jackson <ajax@redhat.com>
2010-11-26r300/compiler: move util functions to radeon_compiler_utilMarek Olšák
The compiler seriously needs a cleanup as far as the arrangement of functions is concerned. It's hard to know whether some function was implemented or not because there are so many places to search in and it can be anywhere and named anyhow.
2010-11-26r300/compiler: add a function for swizzling a maskMarek Olšák
2010-11-26r300/compiler: remove duplicate function rc_mask_to_swzMarek Olšák
2010-11-26r300/compiler: fix rc_rewrite_depth_out for it to work with any instructionMarek Olšák
It looks like the function was originally written for ARB_fragment_program. NOTE: This is a candidate for the 7.9 branch.
2010-11-24r300/compiler: Move declaration before code.Vinson Lee
Fixes this GCC warning with linux-x86 build. radeon_pair_regalloc.c: In function ‘compute_live_intervals’: radeon_pair_regalloc.c:222: warning: ISO C90 forbids mixed declarations and code
2010-11-24r300/compiler: Move declaration before code.Vinson Lee
Fixes this GCC warning with linux-x86 build. radeon_pair_regalloc.c: In function ‘compute_live_intervals’: radeon_pair_regalloc.c:221: warning: ISO C90 forbids mixed declarations and code
2010-11-24meta: Mask Stencil.Clear against stencilMax in _mesa_meta_ClearPeter Clifton
This fixes incorrect behaviour when the stencil clear value exceeds the size of the stencil buffer, for example, when set with: glClearStencil (~1); /* Set a bit pattern of 111...11111110 */ glClear (GL_STENCIL_BUFFER_BIT); The clear value needs to be masked by the value 2^m - 1, where m is the number of bits in the stencil buffer. Previously, we passed the value masked with 0x7fffffff to _mesa_StencilFuncSeparate which then clamps, NOT masks the value to the range 0 to 2^m - 1. The result would be clearing the stencil buffer to 0xff, rather than 0xfe. Signed-off-by: Peter Clifton <pcjc2@cam.ac.uk> Signed-off-by: Brian Paul <brianp@vmware.com>
2010-11-24x11: remove test_proxy_teximage() functionBrian Paul
This was really just for testing purposes.
2010-11-24i965: Don't write mrf assignment for pointsize outputKristian Høgsberg
https://bugs.freedesktop.org/show_bug.cgi?id=31894
2010-11-23i915: Disallow alpha, red, RG, and sRGB as render targetsIan Romanick
Fixes bugzilla #31832 NOTE: This is a candidate for the 7.9 branch.
2010-11-23i965: Use the new embedded compare in SEL on gen6 for VS MIN and MAX opcodes.Eric Anholt
Cuts the extra CMP instruction that used to precede SEL.
2010-11-23i965: Don't upload line smooth params unless we're line smoothing.Eric Anholt
2010-11-23i965: Don't upload line stipple pattern unless we're stippling.Eric Anholt
2010-11-23i965: Don't upload polygon stipple unless required.Eric Anholt
2010-11-23i965: Move gen4 blend constant color to the gen4 blending file.Eric Anholt
2010-11-23r300/compiler: Don't allow presubtract sources to be remapped twiceTom Stellard
https://bugs.freedesktop.org/show_bug.cgi?id=31193 NOTE: This is a candidate for the 7.9 branch.
2010-11-22r600c: fix VC flush on cedar and palmAlex Deucher
2010-11-22r600c: add Ontario Fusion APU supportAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-11-21r300/compiler: Add a more efficient version of rc_find_free_temporary()Tom Stellard
2010-11-21r300/compiler: Enable rename_reg pass for r500 cardsTom Stellard
In addition, the rename_reg pass has been rewritten to use rc_get_readers().
2010-11-21r300/compiler: Use presubtract operations as much as possibleTom Stellard
Previously, presubtract operations where only being used by instructions with less than three source source registers.
2010-11-21r300/compiler: Convert RGB to alpha in the schedulerTom Stellard
2010-11-21r300/compiler: Track readers through branches in rc_get_readers()Tom Stellard
2010-11-21r300/compiler: Handle BREAK and CONTINUE in rc_get_readers()Tom Stellard
2010-11-21r300/compiler: Add rc_get_readers()Tom Stellard
2010-11-21r300/compiler: Ignore alpha dest register when replicating the resultTom Stellard
When the result of the alpha instruction is being replicated to the RGB destination register, we do not need to use alpha's destination register. This fixes an invalid "Too many hardware temporaries used" error in the case where a transcendent operation writes to a temporary register greater than max_temp_regs. NOTE: This is a candidate for the 7.9 branch.
2010-11-21r300/compiler: Use zero as the register index for unused sourcesTom Stellard
This fixes an invalid "Too many hardware temporaries used" error in the case where a source reads from a temporary register with an index greater than max_temp_regs and then the source is marked as unused before the register allocation pass. NOTE: This is a candidate for the 7.9 branch.
2010-11-21r300/compiler: Fix instruction scheduling within IF blocksTom Stellard
Reads of registers that where not written to within the same block were not being tracked. So in a situations like this: 0: IF 1: ADD t0, t1, t2 2: MOV t2, t1 Instruction 2 didn't know that instruction 1 read from t2, so in some cases instruction 2 was being scheduled before instruction 1. NOTE: This is a candidate for the 7.9 branch.
2010-11-21r300/compiler: Fix register allocator's handling of loopsTom Stellard
NOTE: This is a candidate for the 7.9 branch.
2010-11-21r300/compiler: Make sure presubtract sources use supported swizzlesTom Stellard
NOTE: This is a candidate for the 7.9 branch.
2010-11-21r600: Remove unnecessary header.Vinson Lee
2010-11-20intel: Remove unnecessary header.Vinson Lee
2010-11-20r600: Remove unnecesary header.Vinson Lee
2010-11-20swrast: Remove unnecessary header.Vinson Lee
2010-11-19i965: Remove duplicate MRF writes in the FS backend.Eric Anholt
This is quite common for multitexture sampling, and not only cuts down on the second and later set of MOVs, but typically also allows compute-to-MRF on the first set. No statistically siginficant performance difference in nexuiz (n=3), but it reduces instruction count in one of its shaders and seems like a good idea.
2010-11-19i965: Improve compute-to-mrf.Eric Anholt
We were skipping it if the instruction producing the value we were going to compute-to-mrf used its result reg as a source reg. This meant that the typical "write interpolated color to fragment color" or "texture from interpolated texcoord" shader didn't compute-to-MRF. Just don't check for the interference cases until after we've checked if this is the instruction we wanted to compute-to-MRF. Improves nexuiz high-settings performance on my laptop 0.48% +- 0.08% (n=3).