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Missed the homogenous divide of R by Q before...
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The dri_bo_map()s that follow will take care of idling the hardware as needed.
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multisample enable is enabled by default, however gl mandates multisample
rendering rules only apply if there's also a multisampled buffer.
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We have something similar in the X Server that covers X Server rendering, this
is the equivalent here for rendering to the front buffer. If we cared about
avoiding this at glFlush time, we could only do this when some actual
frontbuffer rendering had occurred.
Bug #16392.
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Apparently in Y mode we get bit 6 ^ bit 9. The reflect demo in 'd' mode now
displays correctly.
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The boolean that the server gives us for whether the region is tiled was
getting used as the enum for what tiling mode. Instead, guess the correct
tiling in screen setup.
Also, fix the Y-tiling pitch setup. The pitch to the next tile in Y is
32 scanlines, not 8.
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This disallows vertex shader texture sampling. See bugs 16157, 13838.
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Since GL_ARB_vertex_buffer_object protocol isn't supported yet, these
changes are innocuous.
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It turns out that it's not just deviceID dependent, and there's some additional
undefined factor that determines the bit 6 swizzling. It's now controllable
with swizzle_mode=[012] until we get a response on how to automatically detect.
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These asserts are of questionable use at the moment with things in flux.
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first level of the mipmap. fix #16210
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This isn't complete yet. It does cover the two most common usage cases,
though, and at least the third one (POINT_DISTANCE_ATTENUATION) is possible,
so I'll do that later.
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. There is both a per-texture unit and a per-texture object (at least for
OpenGL 1.4); this should now be supported properly.
. The LOD bias calculation in r300_state has been simplified and corrected
(need to multiply by 32 instead of 31, and ensure clamping)
. do not clamp LOD bias in TexEnv, as that behaviour conflicts with what
the spec says
. set Const.MaxTextureLodBias properly
. remove the no_neg_lod_bias property; if somebody can explain what
it's good for, we can add it back in, but according to Google, nobody
seems to use it
. removed some dead code and unused variables
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Okay, this time it's for real, and for good. This should be a perma-fix.
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Since the gl pkg-config file doesn't convey any specifics about the
backend in use, this adds a new pkg-config file for when DRI is in use.
This can be used by the xserver build to determine if the DRI and/or
GLX extensions are appropriate.
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This was broken in the merge of 965 blit support. It tried to lock only
when things were already locked.
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Most of these were to ensure that caches got synchronized between 2d (or meta)
rendering and later use of the target as a source, such as for texture
miptree setup. Those are replaced with intel_batchbuffer_emit_mi_flush(),
which just drops an MI_FLUSH. Most of the remainder were to ensure that
REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped.
Those are now replaced by automatically flushing those when dropping the lock.
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Nothing would get drawn as the negative coordinates broke the rectangle
intersection code that used unsigned ints. Tested with copypix demo and
sliding the copy to the upper left.
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This disables the textured copy implementation on 965, which didn't appear
to work (mesa copypix demo, disable the blit path, move so that regions don't
overlap and textured is used, and you get garbage). If we resurrect this for
i965, I'd rather it used the 915-style metaops instead. Current metaops code
left in place so that whoever picks it up has a reference.
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Mesa demos tend to leave blending on but in GL_ONE/GL_ZERO, or
GL_SRC_ALPHA/GL_ONE_MINUS_SRC_ALPHA with a source alpha of 1.0.
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Both had some useful bits for the other.
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Taken from commit bad6e175cf59cce630c37d73f6e71f3a4de50ae6.
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This matches 965.
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This lets GEM use pwrite, for an additional 4% or so speedup.
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Signed-off-by: Brian Paul <brian.paul@tungstengraphics.com>
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See bug 14289
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