| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-11-25 | r600: add ARB_texture_non_power_of_two support. | Dave Airlie | |
| This makes the miptree rounds up to the near POT for each level for all radeons, however since mipmaps aren't support with NPOT on previous radeons this calculation shouldn't cause any problems. If it does we can just make it r600 only. I tested a few mipmap demos on r500 and they all seem to work. Signed-off-by: Dave Airlie <airlied@redhat.com> | |||
| 2009-11-24 | r600 : reset stack flag with one channel only. | Richard Li | |
| 2009-11-24 | r600 : fix stack depth setting bug. | Richard Li | |
| 2009-11-24 | r300: fix swtcl bo leak problem. | Dave Airlie | |
| We can get a lot of swtcl bo allocations - need to probably abstract this a bit further. Signed-off-by: Dave Airlie <airlied@redhat.com> | |||
| 2009-11-24 | radeon/r200/r300/r600: make bo mapping be explicit | Dave Airlie | |
| This moves the bo mapping outside the DMA layer and makes it explicit, this should in theory make it simpler to split the clean up the dma/cmdbuf linkage that I created before that is broken. Tested on: r600, rv380 (tcl/no-tcl), rv200 (tcl/no-tcl) Signed-off-by: Dave Airlie <airlied@redhat.com> | |||
| 2009-11-23 | Merge commit 'origin/mesa_7_7_branch' | Maciej Cencora | |
| 2009-11-23 | radeon: fix errors in miptree related function | Maciej Cencora | |
| - typo - memory leak - off by one (spotted by airlied) | |||
| 2009-11-22 | r600 : add support for shader instruction trunc and discard. | Richard Li | |
| 2009-11-23 | r600: hopefully fix segfault. | Dave Airlie | |
| 2009-11-23 | r600: fix inline issues | Dave Airlie | |
| 2009-11-22 | r600 : add stack depth calculation, enable CF pop. | Richard Li | |
| 2009-11-22 | r600 : use cf for all pop now, left optimization for future. | Richard Li | |
| 2009-11-22 | r300: fix VP source conflict resolution on 64-bit machines | Maciej Cencora | |
| On 32bit machines we were lucky because the sizeof(reg) == sizeof(rc_src_register). On 64bit machines pointers are 8 bytes long, so we were overwriting other data. | |||
| 2009-11-22 | r300: fix SIN/COS/SCS instructions for R300 fp | Maciej Cencora | |
| 2009-11-21 | radeon: fix compressed mipmapped textures | Maciej Cencora | |
| Tested on r300 only, other cards may require adjusting texture_compressed_row_align. | |||
| 2009-11-21 | radeon: fix glCompressedTexSubImage | Maciej Cencora | |
| 2009-11-21 | intel: make CopyTex[Sub]Image fallback debug messages more consistent | Roland Scheidegger | |
| 2009-11-21 | i965: Fix several memory leaks on exit. | Eric Anholt | |
| Bug #25194. | |||
| 2009-11-20 | r600 : eliminate Wondows line ending for test code. | Richard Li | |
| 2009-11-20 | Merge remote branch 'origin/mesa_7_7_branch' | Dave Airlie | |
| 2009-11-20 | r100: fix texture_from_pixmap and compiz. | Dave Airlie | |
| r100 state emission has separate rect and non-rect states, if we are doing TFP for a TEXTURE_2D we shouldn't use the rect states as they won't get emitted properly. Signed-off-by: Dave Airlie <airlied@redhat.com> | |||
| 2009-11-19 | r600 : Clean up a bit test code mess. | Richard Li | |
| 2009-11-19 | r600 : change shader pop method for now. | Richard Li | |
| 2009-11-19 | Merge branch 'master' of ssh://richardradeon@git.freedesktop.org/git/mesa/mesa | Richard Li | |
| 2009-11-19 | r600 : check in shader code test enable flag: if flag | Richard Li | |
| R600_ENABLE_GLSL_TEST defined, IL shader code will goto r600 assembler. The test base is /mesa/progs/glsl/brick, and changes shader code in CH06-brick.frag/vert to test different logic op combination. (if,else,while,function,...). The stack depth code is not in yet, so it is hard coded now. So complex code would not run (such as things like 8 loops embeded loop in loop). | |||
| 2009-11-19 | intel: Remove non-GEM support. | Eric Anholt | |
| This really isn't supported at this point. GEM's been in the kernel for a year, and the fake bufmgr never really worked. | |||
| 2009-11-19 | intel: Remove dead intel_context members and move some packing around. | Eric Anholt | |
| 2009-11-19 | intel: Remove our special color packing macros and just use colormac.h. | Eric Anholt | |
| 2009-11-19 | intel: Pack colors for blit at blit time, rather than at ClearColor. | Eric Anholt | |
| 2009-11-19 | intel: Consistently use no_batch_wrap in intel_context struct. | Eric Anholt | |
| 2009-11-19 | i965: Pack brw_wm_fragment_program better. | Eric Anholt | |
| 2009-11-19 | mesa: Remove gratuitous padding in prog_dst_register. | Eric Anholt | |
| The padding was there to indicate the amount of space left from the number of expected bytes in the struct minus allocated bits. But uint bitfields get packed so that they don't cross uint boundaries, and we ended up allocating an extra dword to hold the pad field! | |||
| 2009-11-19 | i965: Pack the brw_wm_prog_key better. | Eric Anholt | |
| 2009-11-19 | i915: Remove dead meta_draw_quad code. | Eric Anholt | |
| 2009-11-19 | tnl: Replace deprecated FogCoordPtr with AttribPtr[_TNL_ATTRIB_FOG] | Eric Anholt | |
| 2009-11-19 | tnl: Replace deprecated ColorPtr[] with AttribPtr or new BackfaceColorPtr. | Eric Anholt | |
| 2009-11-19 | tnl: Replace deprecated ObjPtr with AttribPtr[_TNL_ATTRIB_POS] | Eric Anholt | |
| 2009-11-19 | tnl: Replace deprecated TexCoordPtr with AttribPtr[_TNL_ATTRIB_TEX*] | Eric Anholt | |
| 2009-11-19 | tnl: Replace NormalPtr with AttribPtr[_TNL_ATTRIB_NORMAL] | Eric Anholt | |
| 2009-11-18 | r600 : update PS and VS emit count for loop constants. | Richard Li | |
| 2009-11-18 | r600 : add some defs | Richard Li | |
| 2009-11-18 | r600 : Initial version of glsl fc. | Richard Li | |
| 2009-11-18 | r300: allow disabling s3tc support if libtxc_dxtn is available | Maciej Cencora | |
| 2009-11-18 | Merge branch 'radeon-texrewrite-clean' into mesa_7_7_branch | Maciej Cencora | |
| 2009-11-18 | r600: align for mipmap tree changes | Maciej Cencora | |
| 2009-11-17 | Merge branch 'outputswritten64' | Ian Romanick | |
| Add a GLbitfield64 type and several macros to operate on 64-bit fields. The OutputsWritten field of gl_program is changed to use that type. This results in a fair amount of fallout in drivers that use programs. No changes are strictly necessary at this point as all bits used are below the 32-bit boundary. Fairly soon several bits will be added for clip distances written by a vertex shader. This will cause several bits used for varyings to be pushed above the 32-bit boundary. This will affect any drivers that support GLSL. At this point, only the i965 driver has been modified to support this eventuality. I did this as a "squash" merge. There were several places through the outputswritten64 branch where things were broken. I foresee this causing difficulties later for bisecting. The history is still available in the branch. Conflicts: src/mesa/drivers/dri/i965/brw_wm.h | |||
| 2009-11-17 | r200: align for mipmap tree changes | Maciej Cencora | |
| 2009-11-17 | radeon: align for mipmap tree changes | Maciej Cencora | |
| 2009-11-17 | r300: fix reads and writes for MESA_FORMAT_S8Z24 buffer | Maciej Cencora | |
| Regression was introduced by texformat-rework branch merge. | |||
| 2009-11-17 | Remove unconditional use of glibc specific bswap_16() macro. | Michel Dänzer | |
| Fixes unresolved symbol bswap_16 on non-glibc or little endian glibc platforms. | |||
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index : android-x86-mesa.git | |
| Androïd/x86 port of Mesa drivers | Hugues Hiegel |
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