| Age | Commit message (Collapse) | Author |
|---|
|
finally add some information to R300_RB3D_DSTCACHE_CTLSTAT
|
|
RB3D_COLOR_CHANNEL_MASK
|
|
|
|
|
|
This patch tries to get the Z-Buffer register names in sync with the AMD spec
so that talking to AMD engineers is much simpler.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
image offset is already considered when map, add it again in
StoreImage may lead to wrong result and crash.
|
|
dd1d66fc4ab5d7064113a2017a431c3461598b91.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Also, general clean-up of the Xlib-optimized glDraw/CopyPixels code.
|
|
|
|
|
|
Otherwise, we would go wildly out of bounds if passed -1 (no renderbuffer), such
as while doing LOCK_HARDWARE with glDrawBuffer(GL_NONE).
|
|
Otherwise, glDrawBuffer(GL_NONE); glDrawPixels() results in a segfault when
we try to emit the color buffer state during setup.
|
|
The IS_945 case was left to fall through to the 830 case, along with the
not-recognized-at-all case, making that dead code.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
fix #10788 issue on 965.
|
|
|
|
Currently only implemented for intel hw.
|
|
|
|
|
|
for WM payload. fix #10767
|
|
|
|
|
|
These don't appear to have ever been used.
|
|
It wasn't being initialized at screen setup, so we were getting stub
entrypoints even though it was exposed as enabled. Fixes arbocclude mesa demo.
|
|
The 965 path wasn't setting pClipRects for batch submission since it didn't
want kernel cliprect handling before. The 915 path also grew the INTEL_NO_HW=1
option for testing just driver overhead.
|
|
|
