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2009-10-31radeon: use _mesa_get_current_tex_unitDave Airlie
2009-10-30intel: Use GTT mapping when available for swrast.Eric Anholt
This improves piglit quick.tests runtime from 19:33 minutes to 6:06 on my GM45. It should also hide most of the A17 swizzling issues, though they'll still exist when swapping occurs (which is the kernel's problem either way).
2009-10-30intel: Fix up z24_x8 depth spans since the texformat merge.Eric Anholt
2009-10-30i965: Add an index assert on get_fp_inst array like other compiler arrays.Eric Anholt
2009-10-30i965: Fix BRW_WM_MAX_INSN to reflect current limits.Eric Anholt
Part of fixing bug #24355.
2009-10-30intel: Set the texture format in the TFP path.Eric Anholt
This fixes a regression in piglit's tfp test as of 11caea687e3f10ae12d33e44edf84635f73047dd. Additionally, set the texture format for the RGB textures to MESA_FORMAT_XRGB8888 and support it in the hw paths so that hopefully sw fallbacks involving TFP get better alpha behavior. The radeon drivers appear to need the same fix. Bug #24803
2009-10-30r600: remove duplicate lineAlex Deucher
2009-10-30r600: fill in some missing tex formatsAlex Deucher
This improves shadowtex since the component ordering is at least correct now, but I'm not sure how to deal with texturing from a depth surface yet due to differences in depth and color tile layouts. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-10-30r600: fix a warning, update commentsAlex Deucher
2009-10-30r600: use AUTO_INDEX for draw - saves cmd buffer spaceAndre Maasikas
also seems we can use INDX_OFFSET if start != 0
2009-10-30intel: fix up some XRGB breakageBrian Paul
We weren't choosing the right XRGB span functions for reading the framebuffer. XRGB formats still aren't turned on yet though.
2009-10-29intel: update intel_create_renderbuffer(format), add XRGB supportBrian Paul
Pass a gl_format to intel_create_renderbuffer() instead of GLenum. Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers. However, we don't yet create any renderbuffers or textures with that format. It seems the default alpha value is zero instead of one. Need to investigate that first.
2009-10-29r600: remove the no rrb messagesAlex Deucher
2009-10-29r600: Add support for ARB_depth_clampAlex Deucher
2009-10-29intel: remove memcpy_get_tex_image() codeBrian Paul
This has been lifted into core Mesa where it can be used for all drivers that use the _mesa_get_teximage() fallback for ctx->Driver.GetTexImage().
2009-10-29i965: indentation fixBrian Paul
2009-10-29i965: make brw_sf_prog_key::sprite_origin_lower_left one bitBrian Paul
Shrinks size of key to 8 bytes from 12. Note that progs/demos/spriteblast.c is still broken.
2009-10-29i965: make brw_wm_prog_key a little smallerBrian Paul
GLushort is big enough for the swizzle and origin fields. The key could probably be made smaller still by re-ordering things. I'll hold off on that until after the outputswritten64 branch is merged. The key will get a little larger again with the GLbitfield64 fields.
2009-10-29i915: Fix 1D texture mapping in the t coordinate.Eric Anholt
Fixes piglit tex1d-2dborder test.
2009-10-29i915: Correct and make use of the defines for 32-bit depth texture modes.Eric Anholt
Previously, S8_Z24 depth textures would always be treated as intensity. Fixes piglit depth-tex-modes.
2009-10-29i965: avoid shader translation on window resizeBrian Paul
If the fragment shader doesn't use FRAG_ATTRIB_WPOS (gl_FragCoord) we don't need to worry about the window size and origin in brw_wm_populate_key(). This avoids re-generating the i965 shader code when a window is resized. Issue spotted by Keith Whitwell.
2009-10-29i965: define, use BRW_MAX_DRAW_BUFFERSBrian Paul
i965 might support more than 4 color draw buffers. But if not, this protects from breakage if the Mesa limit is raised.
2009-10-29i965: remove unused varBrian Paul
2009-10-29i965: don't use context state in emit_fb_write()Brian Paul
Put the state that we care about in the hash key. Issue spotted by Keith Whitwell.
2009-10-29i965: use macros to get/set prog_instruction::Aux fieldBrian Paul
This makes things a bit easier to remember/understand.
2009-10-29i965: minor code reformattingBrian Paul
2009-10-29i915: Implement min/max LOD clamping with the hardware.Eric Anholt
This gets us expected behavior for clamping between mipmap levels, and avoids relayout of textures for doing clamping. Fixes piglit lodclamp-between.
2009-10-29i965: Replace a MIN(MAX()) with CLAMP().Eric Anholt
2009-10-29intel: check for single memcpy() in memcpy_get_tex_image()Brian Paul
2009-10-29i965: Fix fallout from ARB_depth_clamp enablement that broke glDepthRange.Eric Anholt
If a backwards glDepthRange was supplied (as with the old Quake no-z-clearing hack), the hardware would have always clamped because we weren't clamping to the min of near/far and the max of near/far. Also, we shouldn't be clamping to near/far at all when not in depth clamp mode (this usually didn't matter since near/far are usually the same as the 0.0, 1.0 clamping you do for fixed-point depth). This should fix funny depth issues in PlaneShift, and fixes piglit depth-clamp-range
2009-10-29intel: Don't bother MI_FLUSHing on glFlush in the DRI2 case.Eric Anholt
We only need it when drawing to the front buffer, which we never do for DRI2. No significant performance difference, but the flush is definitely gone from the end of every batchbuffer.
2009-10-29intel: Clean up merge leftover from the DRI2 swap throttling.Eric Anholt
2009-10-29intel: remove debug codeBrian Paul
2009-10-29intel: added fast memcpy path for glGetTexImage()Brian Paul
2009-10-29radeon: fix incorrect Z format in radeon_alloc_renderbuffer_storage()Brian Paul
And update error message.
2009-10-28mesa: re-remove s3v and trident driver filesBrian Paul
These were removed from master but a few files came back from the texformat-rework branch.
2009-10-28Merge branch 'texformat-rework'Brian Paul
Conflicts: src/mesa/drivers/dri/radeon/radeon_fbo.c src/mesa/drivers/dri/s3v/s3v_tex.c src/mesa/drivers/dri/s3v/s3v_xmesa.c src/mesa/drivers/dri/trident/trident_context.c src/mesa/main/debug.c src/mesa/main/mipmap.c src/mesa/main/texformat.c src/mesa/main/texgetimage.c
2009-10-28Merge branch 'mesa_7_6_branch'Brian Paul
2009-10-28r600: add occlusion query supportAlex Deucher
Based on initial patch from Stephan Schmid <stephan_2303@gmx.de>. Basic idea is to dump the zpass count at the start and end of the query and subtract to get the total number of visible fragments. HW writes alternating qwords for up to 4 DBs. On the first pass, we start at buffer address + 0; on the second pass, we start at buffer address + 8 (bytes). The resulting buffer at the end of the query looks like: qw[0]: db0 start qw[1]: db0 end ... qw[6]: db3 start qw[7]: db3 end The MSB of each qword is the valid bit and the lower 63 bits are the zpass count for that DB. OQ on RV740 is disabled at the moment as it only seems to report results for half of its DBs. This needs further investigation. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-10-28intel: Fix memory leak in case of renderbuffer bad formatVinson Lee
Signed-off-by: Brian Paul <brianp@vmware.com>
2009-10-28Merge branch 'mesa_7_6_branch'Brian Paul
Conflicts: src/mesa/shader/lex.yy.c src/mesa/shader/program_lexer.l
2009-10-28intel: Fix memory leak in event of mip tree allocation failureVinson Lee
Signed-off-by: Brian Paul <brianp@vmware.com>
2009-10-27intel: Fix flipped condition in ARB_sync GetSYnciv(GL_SYNC_STATUS).Eric Anholt
Bug #24435 (cherry picked from commit d56125a298106d81e10674f1c4b3b43b51a5139d)
2009-10-27intel: added region draw_x/y offsets in x/y_tile_swizzle() funcsBrian Paul
This fixes the second part of bug 23552.
2009-10-27radeon: add case for MESA_FORMAT_X8_Z24 in radeon_create_renderbuffer()Brian Paul
2009-10-27intel: silence warningBrian Paul
2009-10-27via: silence unused var warningsBrian Paul
2009-10-27intel: minor clean-up, commentsBrian Paul
2009-10-27intel: use _mesa_get_current_tex_unit() helperBrian Paul
2009-10-27mesa: s/Bilt/BlitBrian Paul