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path: root/src/mesa/drivers
AgeCommit message (Collapse)Author
2009-03-12i915: move declarations before codeBrian Paul
2009-03-12i965: commentsBrian Paul
2009-03-12i965: fix polygon stipple when rendering to FBORobert Ellison
The polygon stipple pattern, like the viewport and the polygon face orientation, must be inverted on the i965 when rendering to a FBO (which itself has an inverted pixel coordinate system compared to raw Mesa). In addition, the polygon stipple offset, which orients the stipple to the window system, disappears when rendering to an FBO (because the window system offset doesn't apply, and there's no associated FBO offset). With these fixes, the conform triangle and polygon stipple tests pass when rendering to texture.
2009-03-12i965: add support for ATI_envmap_bumpmapRoland Scheidegger
2009-03-12regenerate glapiRoland Scheidegger
2009-03-11i965: fix polygon face orientation when rendering to FBORobert Ellison
In the i965, the FBO coordinate system is inverted from the standard OpenGL/Mesa coordinate system; that means that the viewport and the polygon face orientation have to be inverted if rendering to a FBO. The viewport was already being handled correctly; but polygon face was not. This caused a conform failure when rendering to texture with two-sided lighting enabled. This fixes the problem in the i965 driver, and adds to the comment about the gl_framebuffer "Name" field so that this isn't a surprise to other driver writers.
2009-03-11intel: include main/viewport.hBrian Paul
2009-03-11i965: fix lock-ups when GLSL program wrote to gl_FragDepthBrian Paul
It seems the code that set up the FB_WRITE message was incomplete in this case. The number of payload registers was wrong and that caused a hang. It would be good to have a second set of eyes take a look at this...
2009-03-10i965: more code clean-ups, commentsBrian Paul
2009-03-10i965: minor code clean-ups, commentsBrian Paul
2009-03-10i965: use new cast wrappersBrian Paul
2009-03-10i965: added cast wrappers, commentsBrian Paul
2009-03-10i965: asst. code clean-ups, commentsBrian Paul
2009-03-10i965: fix typos in commentsBrian Paul
2009-03-09xmesa: set back-buffer's drawable fieldBrian Paul
Fixes back-buffer rendering when MESA_BACK_BUFFER=pixmap
2009-03-09i965: fix cube map lock-up / corruptionBrian Paul
If we're using anything but GL_NEAREST sampling of a cube map, we need to use the BRW_TEXCOORDMODE_CUBE texcoord wrap mode. Before this, the GPU would either lock up or subsequent texture filtering would be corrupted.
2009-03-09fix typo in fragment pipe alu define, should fix dot3_rgb tex combineRoland Scheidegger
2009-03-07r300: remove assignment to removed StringPos fieldBrian Paul
2009-03-07mesa: move glViewport and glDepthRange functions into new viewport.c fileBrian Paul
A bit of refactoring with an eye toward ES2 and GL 3.1
2009-03-07mesa: gl_register_file enum typedefBrian Paul
2009-03-07mesa: remove GL_MESA_program_debug extensionBrian Paul
This was never fully fleshed out and hasn't been used.
2009-03-07mesa: remove last of _mesa_unreference_framebuffer() callsBrian Paul
2009-03-07r300: shut up valgrindMaciej Cencora
It complained about uninitialized values Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06i965: check if we run out of GRF/temp registersBrian Paul
Before this change we would up emitting instructions with invalid register numbers. This typically (but not always) hung the GPU. For now, just prevent emitting bad instructions to avoid hangs. Still need to do some kind of proper error recovery.
2009-03-06i965: bump up BRW_EU_MAX_INSNBrian Paul
This is the size of the intermediate instruction buffer.
2009-03-06i965: commentsBrian Paul
2009-03-06i965: comments and minor clean-upsBrian Paul
2009-03-06i965: avoid unnecessary calls to brw_wm_is_glsl()Brian Paul
This function scans the shader to see if it has any GLSL features like conditionals and loops. Calling this during state validation is expensive. Just call it when the shader is given to the driver and save the result. There's some new/temporary assertions to be sure we don't get out of sync on this.
2009-03-06r300: fix depth write regression (found by Nicolai Haehnle)Maciej Cencora
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06r300: enable EXT_fog_coord extensionMaciej Cencora
Remove fixed function fog setup. Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06r300: route fog coord and W pos correctlyMaciej Cencora
Also cleanup sw tcl vertex buffer setup Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06r300: rewrite and hopefully simplify RS setupMaciej Cencora
Testing and regression fixes by Markus Amsler Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06r300: add few macros for RS setupMaciej Cencora
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06r300: silence valgrindMaciej Cencora
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06r300: Print reg address when debugging is enabledMaciej Cencora
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06r300: don't crash on sw tcl hw if point size vertex attrib is sentMaciej Cencora
2009-03-05intel: Fix bpp setting of blits to 8bpp targets.Eric Anholt
This was causing hangs in cairogears, as we would blit to the 8bpp target (A8 texture) as 16bpp, and stomp over state objects.
2009-03-05i965: fix 3DPRIMITIVE batch decode of the vertex count field.Eric Anholt
2009-03-05i965: Stop dumping programs after the first all-zeroes entry.Eric Anholt
2009-03-05intel: Add always_flush_batch driconf option for making small batchbuffers.Eric Anholt
This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller batchbuffers.
2009-03-05intel: Add always_flush_cache driconf option for debugging cache flush failure.Eric Anholt
I keep wanting to hack this knob in as a one-time thing, so it seemed useful to have all the time.
2009-03-05i965: Add a note about why the _NEW_STENCIL is required in draw_buffers.Eric Anholt
2009-03-05intel: Remove a gratuitous MI_FLUSH after clearing with a blit.Eric Anholt
The 3D destination shares the same cache so we don't have any trouble with the later commands needing the writes flushed inside of the same batchbuffer.
2009-03-05i965: Remove dead flushing code.Eric Anholt
2009-03-05i965: comments and formatting fixesBrian Paul
2009-03-05i965: fix emit_math1() function used for scalar instructionsBrian Paul
Instructions such as RCP, RSQ, LOG must smear the result of the function across the dest register's X, Y, Z and W channels (subject to write masking). Before this change, only the X component was getting written. Among other things, this fixes cube map texture sampling in GLSL shaders (since cube lookups involve normalizing the texcoord).
2009-03-05i965: fix screen depth test in intel_validate_framebuffer)_Brian Paul
front_region may be null.
2009-03-05i965: init dest reg CondMask = COND_TR (the proper default)Brian Paul
Plus fix up a debug printf.
2009-03-04i965: add software fallback for conformant 3D textures and GL_CLAMPRobert Ellison
The i965 hardware cannot do GL_CLAMP behavior on textures; an earlier commit forced a software fallback if strict conformance was required (i.e. the INTEL_STRICT_CONFORMANCE environment variable was set) and 2D textures were used, but it was somewhat flawed - it could trigger the software fallback even if 2D textures weren't enabled, as long as one texture unit was enabled. This fixes that, and adds software fallback for GL_CLAMP behavior with 1D and 3D textures. It also adds support for a particular setting of the INTEL_STRICT_CONFORMANCE environment variable, which forces software fallbacks to be taken *all* the time. This is helpful with debugging. The value is: export INTEL_STRICT_CONFORMANCE=2
2009-03-04mesa: call _mesa_get_cpu_string() to get CPU info for GL_RENDERER stringBrian Paul