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2010-06-01intel: Fallback to meta if we're asked to CopyTexImage2D from RGB to RGBAKristian Høgsberg
The pixel transfer rules state that we must set alpha to 1.0 in this case which we can't easily do with the blitter. We can do to passes: one that sets the alpha to 0xff and one that copies the RGB bits or we can just use the 3D engine. Neither approach seems worth it for this case.
2010-05-31swrast: add TFP support to swrast.Dave Airlie
This adds TFP support to the swrast driver, with this I can run gnome-shell inside Xephyr slowly. I've no idea why I did it, and g-s has other rendering issues under swrast, but it might be useful to hook up llvmpipe later. I've no idea if I even want to commit it at this point. An enhanced version might just pass the pointer in the indirect rendering case and avoid the memcpy. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-05-31gallium: fix TFP on galliumDave Airlie
This fixes an uninitialised value use in the dri2 st when doing TFP. It uses the driContextPriv which isn't initialised at alloc time. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-05-31intel: Initialize batch->reserved_space on allocationChris Wilson
Fixes the assert (and buffer overrun): glknots: intel_batchbuffer.c:164: _intel_batchbuffer_flush: Assertion 'used >= batch->buf->size' failed. Reported in bug: Bug 28274 - xscreensaver's glknots hangs GPU (945GME/Pineview) https://bugs.freedesktop.org/show_bug.cgi?id=28274 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-05-29r300: fix blits for textures of width/height greater than 2048 on r5xxMarek Olšák
Yes I am fixing r300c ... who knew?
2010-05-28i965: Add cache unit -> bo name mapping for more gen6 state objects.Eric Anholt
This will help in bufmgr debugging and aub dumping.
2010-05-28i965: fix PIPE_CONTROL command for gen6.Zou Nan hai
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2010-05-27fbdev: some hacking to get the driver to compile (untested)Brian Paul
2010-05-26Enable hardware mipmap generation for radeon.Will Dyson
Use _mesa_meta_GenerateMipmap. It is Fast Enough(tm). Signed-off-by: Maciej Cencora <m.cencora@gmail.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-05-26Fix image_matches_texture_obj() MaxLevel checkWill Dyson
When generating or uploading a new (higher) mipmap level for an image, we can need to allocate a miptree for a level greater than texObj->MaxLevel. Signed-off-by: Maciej Cencora <m.cencora@gmail.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-05-26Fallback to software render if there is no miptree for an imageWill Dyson
This can happen when checking if a software fallback for a higher level operation (such as GenerateMipmap) is needed. Signed-off-by: Maciej Cencora <m.cencora@gmail.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-05-26i965: Add support for EXT_timer_query on Ironlake.Eric Anholt
We could potentially do this on G45 as well, though the units are different. On 965, the timestamp is tied to hclk, which would make supporting it harder.
2010-05-26intel: Handle decode of PIPE_CONTROL instructions.Eric Anholt
2010-05-26i965: Move Gen6 debugging emit_mi_flush into the Gen6 block.Eric Anholt
2010-05-26i965: Don't PIPE_CONTROL instruction cache flush.Eric Anholt
This is a workaround for Ironlake errata. The emit_mi_flush is used for a few purposes: 1) Flushing write caches for RTT (including blit to texture) 2) Pipe fencing for sync objects 3) Spamming cache flushes to track down cache flush bugs Spamming cache flushes seems less important than following the docs, and we should probably do that with a different mechanism than the one for render cache flushes.
2010-05-26i965: Emit MI_FLUSH before PSP on Ironlake for clip max threads errata.Eric Anholt
2010-05-26r300/compiler: implement SGT+SLE opcodesMarek Olšák
Reported-by: Gianluca Anzolin <gianluca@sottospazio.it>
2010-05-26r300/compiler: fix dumping r5xx vertex shadersMarek Olšák
2010-05-26r300/compiler: move hardware caps to the radeon_compiler base structMarek Olšák
Needed for vertex shaders too.
2010-05-26r300/compiler: shorten swizzle expressionsMarek Olšák
2010-05-24meta: Convert Z value from normalized to object-space in meta codeBrian Paul
Convert Z from a normalized value in the range [0, 1] to an object-space Z coordinate in [-1, +1] so that drawing at the new Z position with the default/identity ortho projection results in the original Z value. Used by the meta-Clear, Draw/CopyPixels and Bitmap functions where the Z value comes from the clear value or raster position. Fixes piglit tests fdo23670-depth_test, quad-invariance and glsl-orangebook-ch06-bump as well as oglc zbfunc.c. https://bugs.freedesktop.org/show_bug.cgi?id=23670
2010-05-23i965: Add support for all 8 possible ARB_draw_buffers in Mesa.Eric Anholt
We should be able to do 16, but are limited by Mesa's static buffer allocations.
2010-05-23i965: Fix bit allocation for number of color regions for ARB_draw_buffers.Eric Anholt
If you used all 4 color targets we currently support, we would see 0 and end up just writing the first output. Give enough bits that we can do the maximum of 16. Fixes piglit fbo-drawbuffers-maxtargets.
2010-05-20i965: remove disabled code for cycling through MRF registers in clipping.Eric Anholt
The idea would be that you could have multiple send messages going on if nothing depended on the previous message's results and you used a different send message. The problem is that the later send requires the VUE handle returned by the first send's allocate anyway.
2010-05-20intel: Throttle after doing copyregion/swapbuffers round tripKristian Høgsberg
Before we would throttle in the flush callback prior to round-tripping to the server to do copyregion or swapbuffer. Now, instead just note that we need to throttle and do it in intel_prepare_render(), which will be called after receiving the response from the server but before we start rendering the next frame. Even if the server also throttles us in swapbuffer, this just makes the throttling a no-op when we hit intel_prepare_render(). With that we can drop the using_dri2_swapbuffers hack and just always throttle.
2010-05-19r300/compiler: Implement constant foldingNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2010-05-19r300/compiler: Emit 0.5 swizzle when necessary.Tom Stellard
Signed-off-by: Marek Olšák <maraeo@gmail.com>
2010-05-18i965: Remove constant or ignored-by-hw args from FF sync message setup.Eric Anholt
2010-05-18i965: Revert accidental debug change in 562e2d114ec0cba8Eric Anholt
2010-05-18 gen6 fix: fix a wrong bit in binding_table_pointerZou Nan hai
2010-05-17i965: Fix point coordinate replacement after airlied's ffvertex changes.Eric Anholt
This basically restores the previous state, where a vertex result slot is set up for the texcoord to be replaced with point coord. Fixes piglit point-sprite test. Bug #27625
2010-05-17i965: Add SF program disasm under INTEL_DEBUG=sf.Eric Anholt
2010-05-17intel: Call intel_draw_buffer() again after _mesa_make_current()Kristian Høgsberg
The initial call to intel_draw_buffers() happens when intel->ctx.DrawBuffer is still NULL. Call it again after calling _mesa_make_current(). https://bugs.freedesktop.org/show_bug.cgi?id=28112
2010-05-17i965: Make rasterization of single and multiple quad prims match.Eric Anholt
This is trying to follow the spirit of the invariance rules, though they're not specific on this point. Fixes quad-invariance piglit test while retaining the 22s -> 18s win on glean blendFunc. This was a regression in c67d9d84f501f145f841c0b981caff6f4dfd936f.
2010-05-16i965: Remove the half-baked code for multiple OQs at the same time.Eric Anholt
GL doesn't actually let you begin an OQ while one is active, so the extra work was pointless.
2010-05-16i965: Remove unused occlusion query struct field.Eric Anholt
2010-05-16r300/compiler: fix peephole optimizerTom Stellard
Tested-by: Marek Olšák <maraeo@gmail.com>
2010-05-16r300/compiler: Implement simple peephole optimizerNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2010-05-15r300/compiler: silence a warningMarek Olšák
2010-05-14i965: Set the correct provoking vertex for clipped first-mode trifans.Eric Anholt
Bug #24470: glean clipFlat test.
2010-05-14i965: Add program dumping for INTEL_DEBUG=gs.Eric Anholt
2010-05-14i965: Parse the ff_sync URB send opcode on Ironlake disasm.Eric Anholt
2010-05-14i965: Use R16G16B16A16_FLOAT for 3-component half-float.Eric Anholt
The RGBX version isn't supported as a vertex input type, but since we force the last channel's value anyway, this should be fine. The only potential risk I see is in the limiter on VBO reads past the end of the buffer forcing the whole vertex to 0 when the A channel lands past the end. Fixes piglit draw-vertices-half-float.
2010-05-14i965: Dump out the correct shared function for SEND on Ironlake.Eric Anholt
2010-05-14i965: Support INTEL_DEBUG=clip to dump the clip program.Eric Anholt
2010-05-14intel: Handle arbitrary compressed formats in intel_compressed_num_bytes.Eric Anholt
Note that we don't support arbitrary block size for compressed quite yet -- block height of 4 is hard-coded all over the place. Bug #27098 (srgb dxt1 producing a bytes per pixel of 0).
2010-05-13i965: Reduce a single GL_QUADS to GL_TRIANGLE_FAN.Eric Anholt
This is similar to the GL_QUAD_STRIP -> TRIANGLE_STRIP optimization -- the GS usage to split the quads into tris is a huge bottleneck, so a quick check improves glean blendFunc time massively (width * height of the window of single-pixel GL_QUADS, many many times). This may also end up helping with cairo performance, which sometimes ends up drawing a single quad.
2010-05-13intel: Don't update window system renderbuffers on TexImage.Eric Anholt
While sometimes rendering occurs in the form of blits for TexImage, it doesn't interact with the window system renderbuffers, so skip it.
2010-05-13mesa: Remove _mesa_pow(), which is always just pow().Eric Anholt
2010-05-11intel: Don't update renderbuffers in intelSetTexBuffer2 if we have invalidateKristian Høgsberg