Age | Commit message (Collapse) | Author |
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Prevents failing assertions at later stage.
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No measurable difference on cairoperf.
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The pull constants require sending out to an overworked shared unit
and waiting for a response, while push constants are nicely loaded in
for us at thread dispatch time. By putting things we access in every
VS invocation there, ETQW performance improved by 2.5% +/- 1.6% (n=6).
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Everything has been constant-sized until now, but constant buffer
handling changes will make us want some additional variable sized
array.
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Previously for frame throttling we would wait on the first batch after
a swap before emitting another swap, because we had no hook after a
swap was emitted. This meant that if an app managed to squeeze
everything it for a frame had into one batch, it would lock-step with
the GPU. With the swapbuffers changes, we now have the entrypoint we
want.
This takes the WoW intro screen from 25% GPU idle and visibly jerky to
4-5% GPU idle and rather smooth. Other apps such as OpenArena have
run into this problem as well.
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based on Maciej's r300 patch.
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as per 46dc6fd3ed5ef96cda53641a97bc68c3bc104a9f
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Only enabled with KMS.
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Only enabled with KMS.
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The codepaths in the function were almost entirely different.
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Fixes piglit vp-arl-constant-array-huge-overwritten.
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the new relocation for CB_COLOR0_FRAG & CB_COLOR0_TILE add 4
dwords to the default command stream. Increase the prediction
default size to take this into account
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FRAG & TILE buffer are unused but still they need
to be associated with a valid relocation so that
userspace can't try to abuse them to overwritte
GART and then try to write anywhere in system
memory.
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rtype enums are different, DST_REG_OUTPUT got SRC_REG_CONSTANT in some
shaders and produced invalid output/hang
as TEX output is temp register always set out src to SRC_REG_TEMPORARY
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Signed-off-by: Alan Coopersmith <alan.coopersmith@sun.com>
Reviewed-by: Corbin Simpson <MostAwesomeDude@gmail.com>
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- fill in more src/dst formats
- disable depth copies for now
- set proper data formats in render target regs
- fill in additional default state
The swizzles on some of the less used mesa formats
are probably wrong.
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Unfinished.
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Conflicts due to DRI1 removal:
src/mesa/drivers/dri/intel/intel_context.c
src/mesa/drivers/dri/intel/intel_screen.c
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On r100 we emit the indices inline so we need to account
for that in the emission size.
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This bug was fixed in libdrm ages ago, port to non-kms
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Depth buffer accelerated blits aren't implemented yet.
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Needed to support the SwapBuffers code properly.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
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Add event support for the GLX swap buffers event, along with DRI2 protocol
support for generating GLX swap buffers events in the direct rendered case.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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Support the new DRI2 protocol request, DRI2SwapBuffers, in both direct
and indirect rendering context. This request allows the display server
to optimize back->front swaps (e.g. through page flipping) and allows us
to more easily support other GLX features like swap interval and the OML
sync extension in DRI2.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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Conflicts:
src/mesa/drivers/dri/i965/brw_wm_emit.c
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_mesa_Ortho() takes GLdoubles.
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Based on a patch submitted by Pierre Willenbrock <pierre@pirsoft.de>
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This fixes mipmap levels being clipped to the last viewport.
Based on a patch submitted by Pierre Willenbrock <pierre@pirsoft.de>
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R600_OUT_BATCH_RELOC doesn't really use offset so set it
in TEX_RESOURCE2
+ typo fix
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The ordering of texture components was
backwards for the floating point textures.
Signed-off-by: Pierre Ossman <pierre@ossman.eu>
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Check whether the index is within bounds before accessing the array.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
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Seems to be the only way to stay fully portable.
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