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Fixes segfault in progs/xdemos/glxgears_pixmap.c
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Two parts to this:
One we don't keep pointers to possibly freed memory anymore once we unbind the
drawables from the context. Brian I need to figure out what the comment
you made there, can we get a glean/piglit test so we can fix it properly?
If the new gc is the same as the oldGC, we call the unbind even though
we just bound it in that function. doh.
(cherry picked from master, commit 77506dac8e81e9548a7e9680ce367175fe5747af)
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For the TXP instruction we check if the texcoord is really a 4-component
atttibute which requires the divide by W step. This check involved the
projtex_mask field. However, the projtex_mask field was being miscalculated
because of some confusion between vertex program outputs and fragment
program inputs.
1. Rework the size_masks calculation so we correctly set bits corresponding
to fragment program input attributes.
2. Rename projtex_mask to proj_attrib_mask since we're interested in more
than just texcoords (generic varying vars too).
3. Simply the indexing of the size_masks and proj_attrib_mask fields.
4. The tracker::active[] array was mis-dimensioned. Use MAX_PROGRAM_TEMPS
instead of a magic number.
5. Update comments, add new assertions.
With these changes the Lightsmark demo/benchmark renders correctly, until
we eventually hit a GPU lockup...
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Fixes memory leak when destroying framebuffers.
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This reverts commit 0952645fe04a27968565ea4d913500c23b1b11e3.
Need to revisit where this is going wrong
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This fixes an assertion in glReadPixels from the front buffer.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Add all source files that are symlink'ed from common radeon code to the
ignore list.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Conflicts:
Makefile
src/gallium/drivers/softpipe/sp_screen.c
src/mesa/main/version.h
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the driver used to overwrite grf0 then use implicit move by send instruction
to move contents of grf0 to mrf1. However, we must not overwrite grf0 since
it's still used later for fb write.
Instead, do the move directly do mrf1 (we could use implicit move from another
grf reg to mrf1 but since we need a mov to encode the data anyway it doesn't
seem to make sense).
I think the dp_READ/WRITE_16 functions may suffer from the same issue.
While here also remove unnecessary msg_reg_nr parameter from the dataport
functions since always message register 1 is used.
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Initialize all driver function hooks before calling _mesa_initialize_context(),
and handle all buffer objects in intel_buffer_object().
Fixes assertion failure when running glxinfo.
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drm cmd checker would refuse cube emits
also fix an issue in the cs path which would calculate the register
offset off by one dword.
Only same testing done as original code (none except compile tested).
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drm cmd checker rightfully fell over any cube emit
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Fixes #22181. R200 requires this since DP4 is used in hw tnl mode.
R300 prefers it (should be faster due to no instruction dependencies), but
both methods should be correct (when sw tcl is used though, MUL/MAD might
be faster). Probably doesn't make much difference for R100 since vertex progs
are executed in software anyway, but let's just keep it the same there too.
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Plug them in via _mesa_init_query_object_functions().
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Plug them in via _mesa_init_buffer_object_functions().
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Conflicts:
docs/relnotes-7.6.html
progs/tests/Makefile
src/gallium/drivers/softpipe/sp_prim_vbuf.c
src/glx/x11/indirect.c
src/mesa/glapi/Makefile
src/mesa/glapi/dispatch.h
src/mesa/glapi/glapioffsets.h
src/mesa/glapi/glapitable.h
src/mesa/glapi/glapitemp.h
src/mesa/glapi/glprocs.h
src/mesa/main/dlist.c
src/mesa/main/enums.c
src/mesa/sparc/glapi_sparc.S
src/mesa/x86-64/glapi_x86-64.S
src/mesa/x86/glapi_x86.S
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The default values true and false will expand to "1" and "0" when
gcc -std=c99, causing bool option defaults to generate runtime failures.
One solution is to specify bool option defaults quoted as "true" and "false".
Add a macro to assist this.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
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We were packing according to the pitch, while the hardware appears to base
it on the base level width.
With this and the previous commit, fbo-cubemap now matches untiled behavior.
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3D rendering to tiled textures was being done with non-tile-aligned offsets.
The G4X hardware has fields to let us support it easily and correctly, while
the pre-G4X hardware requires a path full of suffering, so we just fall back.
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This lets ut2004 avoid hitting the elt warning.
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This may hurt if miptree relayout occurs, since we can't blit Y tiled
objects. But it corrects depth tests on FBOs using textures.
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if its on the list its on the list don't go readding it.
multitexturing from the same texture could cause this.
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We flush the command buffer so we don't emit mixed
state (with new and previous buffer size) command
buffer, this is especialy affecting zbuffer states.
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vap index offset is programmed to 0 by the kernel, it
would add work to kernel checker to allow userspace
programming of this so it's now disallowed with CS
on KMS.
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Two parts to this:
One we don't keep pointers to possibly freed memory anymore once we unbind the
drawables from the context. Brian I need to figure out what the comment
you made there, can we get a glean/piglit test so we can fix it properly?
If the new gc is the same as the oldGC, we call the unbind even though
we just bound it in that function. doh.
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Conflicts:
src/mesa/main/api_validate.c
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glsl compiler will not generate OPCODE_SWZ, and as a first step it would
be translated away to a MOV anyway (why?), but later internally this opcode is
generated (for EXT_texture_swizzling).
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Conflicts:
docs/relnotes-7.6.html
src/mesa/main/mtypes.h
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This allows us to return the unused portion of the dma buffer
to the allocator instead of wasting nearly 16k a pop.
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still always enable max, but the right values this time.
More work should probably be done for saner limits without mm, and/or
dri conf option allow_large_textures (which is ignored) removed.
3D limit on r100 is pretty arbitrary as still handled by swrast anyway.
Also fix r300 limits (except 3d I've no idea what the max is anyway so
keep using mesa default).
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This was already correct in the GEM code
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Conflicts:
src/mesa/drivers/dri/i915/i915_tex_layout.c
src/mesa/drivers/dri/i965/brw_wm_glsl.c
src/mesa/drivers/dri/intel/intel_buffer_objects.c
src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
src/mesa/drivers/dri/intel/intel_pixel_draw.c
src/mesa/main/enums.c
src/mesa/main/texstate.c
src/mesa/vbo/vbo_exec_array.c
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I haven't fixed all the regressions yet, and it'll be easy to re-enable when
the known problems are fixed.
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It's the last addressable byte, not the byte after the end of the buffer.
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I noticed this when this MI_FLUSH showed up in IPEHR for the ut2004 hang.
Not setting the reserved bit didn't help, though.
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Fixes assertion failure on norsetto shadow mapping demo.
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