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Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/
Bug #22228
(cherry picked from commit 56ab92bad8f1d05bc22b8a8471d5aeb663f220de)
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Fixes piglit arl.vp.
(cherry picked from commit d52d78b4bcd6d4c0578f972c0b8ebac09e632196)
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For an app that's blowing out the state cache, like sauerbraten, the
memset of the giant arrays ended up taking 11% of the CPU even when only a
"few" of the entries got used. With this, the WM program compile drops back
down to 1% of CPU time.
Bug #24981 (bisected to BRW_WM_MAX_INSN increase).
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Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/
Bug #22228
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Fixes piglit arl.vp.
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These are needed for HiZ which is not currently used and
the _BASE reg requires a reloc which is not currently supported
in the drm.
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- consolidate DB render setup
- only enable perfect ZPASS counts and cull disable
when OQ is active
- enable early Z
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These are needed for HiZ which is not currently used and
the _BASE reg requires a reloc which is not currently supported
in the drm.
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No statistically significant performance difference at n=3 with either
openarena or my GL demo, but cutting program size seems like a good
thing to be doing for the hypothetical app that has a working set near
icache size.
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This should fix issues with antialiased lines in GLSL.
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The PINTERP code should be faster for brw_wm_glsl.c now since brw_wm_emit.c's
had been improved, and pixel_w should no longer stomp on a neighbor to dst.
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This drops support for get_src_reg_imm in these, but the prospect of getting
brw_wm_pass*.c onto our GLSL path is well worth some temporary pain.
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This matches brw_wm_emit.c, which we'll be using shortly. There's a
possible penalty here in that we'll allocate registers for unused channels,
since we aren't doing ref tracking like brw_wm_pass*.c does. However, my
measurements on GM965 don't show any for either OA or UT2004 with the GLSL
path forced.
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This keeps the individual state files from having to export their
structures for brw_state_cache initialization.
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I fixed it properly as of 7216679c1998b49ff5b08e6b43f8d5779415bf54.
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Otherwise, we could lose track of rendering to that image, which could
easily happen during mipmap generation.
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This should do all the things that MI_FLUSH did, but it can be pipelined
so that further rendering isn't blocked on the flush completion unless
necessary.
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gen2/3/4 are easier to say than "8xx, 915-945/g33/pineview, 965/g45/misc",
and compares on generation are often easier than stringing together a bunch
of chipset checks.
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This should fix the memory leaks in the assembly parser without the
regressions.
The conflicts in program_lexer.l were related to changes in returning
strings between the branches (always return IDENTIFIER vs. returing
either IDENTIFIER or USED_IDENTIFIER).
The conflicts in program_parse.y were related to two changes in master
One change prints a variable name in an error message. The other
change adds outputVarSize to the OUTPUT_statement rule. The cause the
position of the IDENTIFIER to change from $2 to $3.
Conflicts:
src/mesa/shader/lex.yy.c
src/mesa/shader/program_lexer.l
src/mesa/shader/program_parse.tab.c
src/mesa/shader/program_parse.y
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fixes bug 24953.
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The code was assuming ctx->DrawBuffer == ctx->ReadBuffer.
Passing the pixmap is simpler and better.
Fixes a potential segfault.
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Conflicts:
src/mesa/drivers/windows/gdi/mesa.def
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Seems INDX_OFFSET doesn't work properly on some cards,
so change back to immediate mode indices. Seems to only
affect DRI1. Needs more investigation.
Rework and clean up the draw functions.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Signed-off-by: Brian Paul <brianp@vmware.com>
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Signed-off-by: Brian Paul <brianp@vmware.com>
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Before, if we just called glXMakeCurrent() and didn't render anything we'd
still trigger a flushFrontBuffer() call.
Now only set the intel->front_buffer_dirty field at state validation time
just before we draw something.
NOTE: additional calls to intel_check_front_buffer_rendering() might be
needed if I missed some rendering paths.
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