Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-07-13 | r300: operate on copy of a program when pairing instructions | Maciej Cencora | |
We need to keep unpaired program for vertex program NQSSADCE. | |||
2009-07-13 | r300: handle relative addressing in NQSSADCE | Maciej Cencora | |
2009-07-13 | r300: handle ARB_vertex_program specific instructions in NQSSADCE | Maciej Cencora | |
2009-07-13 | r300: move depth output rewrite out of NQSSADCE | Maciej Cencora | |
2009-07-13 | r300: rewrite FOGC and HPOS attribs handling | Maciej Cencora | |
Rewrite vertex and fragment programs so that we don't have to do any hacks on lower level. | |||
2009-07-13 | r300: bind vertex program to fragment program | Maciej Cencora | |
2009-07-13 | r300: recalculate used inputs and outputs after dead code removal | Maciej Cencora | |
2009-07-13 | r300: move fragment program selection before vertex program selection | Maciej Cencora | |
Prepare for wpos and fogc handling rewrite. | |||
2009-07-13 | r300: implement proper IsProgramNative check for vertex programs | Maciej Cencora | |
2009-07-13 | r300: don't modify original vertex program | Maciej Cencora | |
Keep the original vertex program untouched because it may be needed after some state change for generating new r300 specific vertex program. | |||
2009-07-13 | r300: cache translated fragment programs | Maciej Cencora | |
2009-07-13 | r300: update state parameters only once per rendering operation | Maciej Cencora | |
2009-07-13 | r300: translate non native insts earlier for easier debugging | Maciej Cencora | |
2009-07-13 | r300: print vertex program after adding artificial output insts | Maciej Cencora | |
2009-07-13 | r300: use mesa provided function for adding MVP code | Maciej Cencora | |
2009-07-13 | r300: simplify insert_wpos a little | Maciej Cencora | |
2009-07-13 | Merge branch 'mesa_7_5_branch' | Brian Paul | |
2009-07-14 | radeon: port more front fixes from intel. | Dave Airlie | |
Port fixes to read buffer from front. | |||
2009-07-14 | radeon/r200: fix color masking under dri2 | Dave Airlie | |
Need to retrieve the bits from the rrb not from screen struct | |||
2009-07-14 | radeon: Use Stencil.Enabled instead of Stencil._Enabled in DrawBuffers. | Dave Airlie | |
The _Enabled field isn't updated at the point that DrawBuffers is called, and the Driver.Enable() function does the testing for stencil buffer presence anyway. | |||
2009-07-14 | radeon/fbo: stencil bits fix from Michel in intel fbo code | Dave Airlie | |
2009-07-13 | r128: fix two-sided lighting segfault seen in GLUT's olight demo | Peteri Andras | |
2009-07-12 | intel: Bump driver data, add RC3 tag | Ian Romanick | |
2009-07-13 | i965: add support for new chipsets | Xiang, Haihao | |
1. new PCI ids 2. fix some 3D commands on new chipset 3. fix send instruction on new chipset 4. new VUE vertex header 5. ff_sync message (added by Zou Nan Hai <nanhai.zou@intel.com>) 6. the offset in JMPI is in unit of 64bits on new chipset 7. new cube map layout | |||
2009-07-12 | r300: move fallback warnings inside fallback debugging | Dave Airlie | |
random output is bad | |||
2009-07-12 | r300: fix clear mask to not use sw if not necessary | Dave Airlie | |
2009-07-12 | radeon: Fix crash when rendering to incomplete texture and other formats | Nicolai Hähnle | |
It is possible to bind texture images of an incomplete mipmapped texture. Software fallbacks in this case incorrectly tried to mmap the entire texture. Additionally, add span functions for 1555 and 4444 formats. This fixes crashes in piglit's fbo-readpixels test; unfortunately, the test itself still fails - this needs to be investigated. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com> | |||
2009-07-12 | radeon: update clear code from Intel codebase. | Dave Airlie | |
This updates some of the clear code from Intel gives a 5x clearspd perf for me here. played openarena also, not sure if the viewport changes broke anything, | |||
2009-07-12 | radeon: fbo fix firecube crashes | Dave Airlie | |
it might still be misrendering not sure | |||
2009-07-11 | radeon: Fix scissor rectangle calculation when rendering to FBO. | Michel Dänzer | |
fgl_glxgears -fbo runs, though the gears don't look right yet. | |||
2009-07-11 | radeon: enable GL_NV_texture_rectangle under dri2. | Dave Airlie | |
2009-07-11 | radeon: set texture in state properly. | Dave Airlie | |
make sure to turn off when no texture is used in hw | |||
2009-07-11 | radeon: make swtcl emit size bigger | Dave Airlie | |
2009-07-08 | glx: death to RCS tag | RALOVICH, Kristóf | |
2009-07-08 | r300: fix regression introduced by ca13937ef97c7779f639dcfc95b3798a11de01bd | Maciej Cencora | |
Stride == 0 means that we value for first vertex should be copied to every other vertices (e.g. constant color). This fixes glean/vertProg1 and sauerbraten with enabled shaders. | |||
2009-07-08 | radeon: fix copy and paste typo | Maciej Cencora | |
2009-07-07 | intel: Fix flipped Y for glDrawPixels(GL_STENCIL_INDEX) to window system. | Eric Anholt | |
Even after fixing bugs in this code, it doesn't make me feel any cleaner. Fixes piglit stencil-drawpixels. | |||
2009-07-07 | intel: Fall back on glCopyPixels(GL_DEPTH) or GL_STENCIL. | Eric Anholt | |
2009-07-07 | i965: Remove BRW_NEW_INPUT_VARYING | Eric Anholt | |
This state flag has been unused since the ffvertex_prog move to core. | |||
2009-07-04 | i965: fix fetching constants from constant buffer in glsl path | Roland Scheidegger | |
the driver used to overwrite grf0 then use implicit move by send instruction to move contents of grf0 to mrf1. However, we must not overwrite grf0 since it's still used later for fb write. Instead, do the move directly do mrf1 (we could use implicit move from another grf reg to mrf1 but since we need a mov to encode the data anyway it doesn't seem to make sense). I think the dp_READ/WRITE_16 functions may suffer from the same issue. While here also remove unnecessary msg_reg_nr parameter from the dataport functions since always message register 1 is used. | |||
2009-07-04 | i965: Remove bad constant buffer constant-reg-already-loaded optimization. | Eric Anholt | |
Thanks to branching, the state of c->current_const[i].index at the point of emitting constant loads for this instruction may not match the actual constant currently loaded in the reg at runtime. Fixes a regression in my GLSL program for idr's class since b58b3a786aa38dcc9d72144c2cc691151e46e3d5. | |||
2009-07-06 | radeon: ensure cmdbuf space for state + AOS is available | Dave Airlie | |
The problem is if we find out later we don't have any cmdbuf space but we've already written the arrays to the DMA buffer object, we end up emitting the current cmdbuf which has references to the current DMA object we then send that to the hw and we can't reference the arrays we just emitted to the old DMA buffer. things go bad, crash boom. This can probably be tuned further + swtcl probably needs some fixes | |||
2009-07-06 | r200: fix makefile | Dave Airlie | |
2009-07-06 | radeon: fixup FBO depth 24 allocations to avoid assert | Dave Airlie | |
2009-07-06 | radeon/r200/r300: port to new space checking code in libdrm | Dave Airlie | |
This moves a big chunk of the space checking code into libdrm so it can be shared by the DDX. | |||
2009-07-05 | r300: fix vertex limits | Maciej Cencora | |
- don't limit vertex count if we are using indices - max indices count is 65535 not 65536 - remove some comments that don't apply anymore - remove unreachable code | |||
2009-07-03 | Merge branch 'mesa_7_5_branch' | Jakob Bornecrantz | |
Conflicts: src/mesa/main/dlist.c src/mesa/vbo/vbo_save_api.c | |||
2009-07-03 | intel: Also update stencil bits in intel_update_wrapper(). | Michel Dänzer | |
Fixes assertion failure when binding depth/stencil texture to FBO stencil attachment. | |||
2009-07-03 | radeon: Wait for BO idle if necessary before mapping it. | Michel Dänzer | |
Fixes fighting between GPU and software rendering with TTM. | |||
2009-07-03 | r300: Guard debugging output. | Michel Dänzer | |