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2007-03-25Fix some renderbuffer reference counting issues. Also fixes a mem leak.Brian
2007-03-25i965: The given urb layout(maximal size of urb entries and theXiang, Haihao
values for nr of entries) should meet the requirement.
2007-03-25r300: Whitespace cleanup in r300_texmem.cNicolai Haehnle
2007-03-25r300: Whitespace cleanup in r300_texstate.cNicolai Haehnle
2007-03-25r300: Fix regression: unnecessary node indirectionNicolai Haehnle
The texture_rectangle fix introduced a bug where every texture instruction caused a new indirection.
2007-03-25Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestlineNian Wu
2007-03-25nouveau: implement nv20Clear and nv20ScissorDave Airlie
Still crashes out on scissor regs
2007-03-24r300: Fix texture coordinate calculation for rectangle texturesNicolai Haehnle
R300 hardware takes texcoords in the range 0..1 even for rectangle textures. Previously, the necessary texcoord conversion was applied to the texture coordinate during vertex processing in a render stage. This is obviously wrong when fragment programs are used, which can calculate arbitrary coordinates for TEX instructions. Therefore, we now inject an appropriate MUL instruction before a TEX that reference a rectangle texture.
2007-03-24r300: No assertion when accessing incomplete texture images.Nicolai Haehnle
There used to be an assertion when a fragment program accesses an incomplete texture image. Work around this assertion. Note: I am unsure whether this workaround produces the desired result (0,0,0,1) on all hardware.
2007-03-24r300: Fix: KIL instruction don't require texturesNicolai Haehnle
When no textures were enabled, a KIL instruction triggered an assertion in r300_setup_rs_unit.
2007-03-24nouveau: some swtcl fixesBen Skeggs
2007-03-24Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestlineNian Wu
2007-03-23Implement alpha buffer copy for SwapBuffers().Brian
Nicolai writes: When the pixmap pixel format has no alpha channel, the x11 driver (software rendering) adds a wrapped alpha channel on request. During SwapBuffers, this alpha channel is not copied from back to front, which means that the front buffer doesn't really contain the contents that the back buffer previously contained. A subsequent glReadPixels from the front buffer will return an incorrect result. The following patch attempts to fix this.
2007-03-23r300: Whitespace cleanup (remove trailing spaces)Nicolai Haehnle
2007-03-22Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestlineNian Wu
2007-03-22fix for bug#10339Xiang, Haihao
StateFlags has been updated in _mesa_add_state_reference
2007-03-21merge from masterBrian
2007-03-21fix copy and paste bug from last commit in fog generation code for GL_LINEAR fogRoland Scheidegger
2007-03-21Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestlineNian Wu
2007-03-21nouveau: update for drm interface changes (0.0.5)Ben Skeggs
2007-03-21nouveau: SwapBuffers() needs to perform a glFlush()Ben Skeggs
2007-03-21r300: Remove the program-global const_sin indexNicolai Haehnle
The index is no longer necessary to share constants between multiple SIN/COS/SCS instructions inside a single fragment program, and storing a tiny implementation detail like this in the fragment_program structure itself was just nasty.
2007-03-20r300: Whitespace cleanup (remove trailing spaces)Nicolai Haehnle
2007-03-20fix for bug#10347Xiang, Haihao
not sure which brw surface for DXT3 & DXT5, so restore the previous choice.(changed in commit 84081774e62a8af18e6bf894ea69f63b97dcfe96)
2007-03-20use passed target parameterAlan Hourihane
2007-03-20Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestlineNian Wu
2007-03-20nouveau: fix typoBen Skeggs
2007-03-20nouveau: fail translate if we use too many params somehowBen Skeggs
2007-03-20nouveau: NVSDBG macroBen Skeggs
2007-03-19r300: Cleanup fragment program constant allocation, share constantsNicolai Haehnle
The constant/parameter allocation was significantly simplified, removing one unnecessary copy operation of parameters. The dirty state tracking is unchanged and far from optimal, since all state is always re-fetched. Constants and parameters are now emitted only once, which significantly reduces the resource pressure on larger programs.
2007-03-19r300: Fix special case (tmp.x <= 0) in fragment program LIT instructionNicolai Haehnle
Also, fix a typo in a related comment.
2007-03-19r300: Clear fragment program instruction slots on first useNicolai Haehnle
Make sure that instruction slots are fully initialized with NOPs during find_and_prepare_slot(). This fixes a bug when a fragment program was translated more than once (e.g. due to a second call to glProgramStringARB). This partially fixes glean/fragProg1.
2007-03-19r300: Dump fragment program after translation if RADEON_DEBUG=pixel is setNicolai Haehnle
2007-03-19r300: Whitespace cleanup (remove trailing spaces)Nicolai Haehnle
2007-03-19r300: Fix WRITEMASK handling when writing to result.depthNicolai Haehnle
This is a necessary change to emit the right instructions when writing to result.depth. However, even with this test, Z-write doesn't work properly, and I don't fully understand why. In addition to this, we'll at least have to disable early-Z, but even that doesn't seem to be enough.
2007-03-19r300: Streamlined fragment program LIT implementationNicolai Haehnle
Fix a bug in the LIT implementation (clamp exponent to 128, not 0.5) and change the implementation around. In theory, the new implementation needs as little as 5 instruction slots. Unfortunately, the dependency analysis in find_and_replace_slot is not strong enough to look at individual components of a register yet.
2007-03-19r300: Fix fragment program reorderingNicolai Haehnle
Do not move an instruction that writes to a temp forward past an instruction that reads the same temporary.
2007-03-19r300: Fragment program dumps format tex instructionsNicolai Haehnle
2007-03-19r300: Fix hw fragment program dumpNicolai Haehnle
Dumps of fragment programs were incorrect when the program consisted of multiple nodes. Also, improved the formatting a bit.
2007-03-19r300: Fix fragment program instruction pairing and register allocationNicolai Haehnle
There were a number of bugs related to the pairing of vector and scalar operations where swizzles ended up using the wrong source register, or an instruction was moved forward and ended up overwriting an aliased register. The new algorithm for register allocation is quite conservative and may run out of registers before necessary. On the plus side, It Just Works. Pairing is done whenever possible, and in more cases than before, so in practice this change should be a net win.
2007-03-19i915tex: The intended triple buffering fix.Michel Dänzer
Making modifications while the editor spawned by git-commit was suspended didn't have the intended effect.
2007-03-19i915tex: Fix triple buffering after recent Mesa core changes.Michel Dänzer
Remove superfluous _mesa_resize_framebuffer call which is now harmful because it causes the third renderbuffer to have width/height 0, so Mesa refuses to render to it. In the long term, it would be nice to remove the hack in intel_alloc_window_storage in favour of a proper Mesa interface for flipping between more than two colour buffers.
2007-03-19Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestlineNian Wu
2007-03-18fix off-by-one in load_state_immediateKeith Whitwell
2007-03-18fix typo in subrect_disable packetKeith Whitwell
2007-03-18fix typo in subrect_disable packetKeith Whitwell
2007-03-18screen offset changes, bug 9965Miguel Marte
2007-03-18r300: Removed the deprecated $XFree86$ CVS keywords.Oliver McFadden
2007-03-18r300: Corrected the string for polygon mode; it wasn't updated from unkXXX.Oliver McFadden
2007-03-19nouveau: avoid using uninitialised TexSrcUnit.Ben Skeggs