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2009-09-24r600: various cleanupsAlex Deucher
- max texture size is 8k, but mesa doesn't support that at the moment. - attempt to set shader limits to what the hw actually supports - clean up some old r300 cruft - no need to explicitly disable irqs. This is fixed in the drm now. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-09-24r600: fix some issues with LIT instructionAndre Maasikas
- MUL_LIT is ALU.Trans instruction - some Trans instructions can take 3 arguments - don't clobber dst.x, use dst.z as temp, it'll get written correct value in last insn - respect source swizzles
2009-09-24r600: fix point sizesAlex Deucher
registers takes radius
2009-09-24r600: fix polygon offsetAlex Deucher
2009-09-24radeon: don't build non-r600 span code on r600Alex Deucher
2009-09-24r600: minor span cleanupsAlex Deucher
2009-09-24r600: support position_invariant programsAndre Maasikas
2009-09-24r600: add span support for 1D tilesAlex Deucher
1D tile span support for depth/stencil/color/textures Z and stencil buffers are always tiled, so this fixes sw access to Z and stencil buffers. color and textures are currently linear, but this adds span support when we implement 1D tiling. This fixes the text in progs/demos/engine and progs/tests/z*
2009-09-24r600: fix warningAlex Deucher
Noticed by rnoland on IRC.
2009-09-24r600: fix texcoords from constantsAndre Maasikas
with some minor updates from Richard.
2009-09-24r600: enable caching of vertex programsAndre Maasikas
2009-09-24r600: check if textures are actually enabled before submissionAlex Deucher
noticed by taiu on IRC.
2009-09-24r600: fix ftp for dri1Alex Deucher
We use t->bo for dri1 since r600 uses CS for dri1.
2009-09-24r600: don't setup hardware state if TFPDave Airlie
if we have a BO here it means TFP and we should have set it up already. tested by b0le on #radeon
2009-09-24r600: fix dri2 clippingAlex Deucher
2009-09-23r300: fallback to software rendering if we are out of free texcoordsMaciej Cencora
Fixes #22741
2009-09-22mesa: don't re-use the meta glDrawPixels VBO; create a new one each timeBrian Paul
This should help to work around bugs 24083 and 23670.
2009-09-22r300: Fix crash reported in bug #24066Nicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-21radeon: update buffer map/unmap code for changes introduced in ↵Maciej Cencora
92033a9516942d7272ce4bf36ecd422009bbaf60 and 822c7964819ca1fcc270880d4ca8b3de8a4276d0
2009-09-21r300: fix a typoMaciej Cencora
2009-09-21r300: Zero-initialize register for NV_vertex_programNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-21r300: Fix handling of NV_vertex_program parametersNicolai Hähnle
The handling is a bit inefficient, unfortunately, but I don't want to make any intrusive changes for Mesa 7.6. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-21Merge branch 'mesa_7_5_branch' into mesa_7_6_branchMichel Dänzer
2009-09-21intel: Fix crash in intel_flush().Michel Dänzer
Since commit 2921a2555d0a76fa649b23c31e3264bbc78b2ff5 ('intel: Deassociated drawables from private context struct in intelUnbindContext'), intel->driDrawable may be NULL in intel_flush().
2009-09-20radeon: Fix legacy bo not to reuse dma buffers before refcount is 1.Pauli Nieminen
This should help detecting possible memory leaks with dma buffers and prevent possible visual corruption if data would be overwriten too early.
2009-09-20r300/compiler: Fix trig instructions in R300 fpNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-20radeon: Fix typo in variable name.Pauli Nieminen
2009-09-20radeon: Improve WARN_ONCE macro to appear as single statement.Pauli Nieminen
Do-while makes macro safe to be used with if and for constructions. Also remove __LINE__ macro from variable name because scope is local to macro anyway.
2009-09-20radeon: Fix "verts" debugging enableNicolai Hähnle
Copy'n'paste apparently prevented the RADEON_VERTS flag from being enabled. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-20r300/compiler: Fix R300 fragment program regression introduced by 0723cd1...Nicolai Hähnle
We obviously need to move the code addr register backwards because their may be overlap. This bug affected in particular the Compiz water plugin. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-18[i965] add a missing header fileZou Nan hai
2009-09-18 [i965] use intel_batchbuffer_flush to flush the clearZou Nan hai
2009-09-16mesa: fix clip plane, fog issuesBrian Paul
2009-09-16Merge branch 'mesa_7_5_branch' into mesa_7_6_branchIan Romanick
Conflicts: src/mesa/main/dlist.c
2009-09-16intel: Deassociated drawables from private context struct in intelUnbindContextIan Romanick
The generic DRI infrastructure makes sure that __DRIcontextRec::driDrawablePriv and __DRIcontextRec::driReadablePriv are set to NULL after unbinding a context. However, the intel_context structure keeps cached copies of these pointers. If these cached pointers are not NULLed and the drawable is actually destroyed after unbinding the context (typically by way of glXDestroyWindow), freed memory will be dereferenced in intelDestroyContext. This should fix bug #23418.
2009-09-16i965: do a flush in clear, fix openarena render issue,Zou Nan hai
fd.o bug# 23857
2009-09-11radeon: Remove structure allocation from iterator variable.Pauli Nieminen
dma_bo varaible is only used for iterating so allocating memory for it only causes memory leaks.
2009-09-10intel: disable intel_stencil_drawpixels() for nowBrian Paul
It doesn't work reliably even when all the prerequisite checks are made.
2009-09-10Fix merge failIan Romanick
One of the conflicst from this merge was missed: commit 0c309bb494b6ee1c403442d1207743f749f95b6e Merge: c6c44bf d27d659 Author: Brian Paul <brianp@vmware.com> Date: Wed Sep 9 08:33:39 2009 -0600
2009-09-10mesa: need to set all stencil bits to 0 before setting the 1 bitsBrian Paul
Plus, check for pixel transfer stencil index/offset.
2009-09-10Merge branch 'mesa_7_5_branch' into mesa_7_6_branchIan Romanick
Conflicts: src/mesa/drivers/dri/intel/intel_context.c
2009-09-10i965: Fix relocation delta for WM surfaces.Eric Anholt
This was a regression in 0f328c90dbc893e15005f2ab441d309c1c176245. Bug #23688 Bug #23254 (cherry picked from commit 5604b27b9326ac542069a49ed9650c4b0d3e939a)
2009-09-10intel: add B43 chipset supportZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Hopefully this will be one of the last cherry-picks. (cherry picked from commit ca246dd186f9590f6d67038832faceb522138c20)
2009-09-10radeon: Change debugging code to use macros instead of inline functions.Pauli Nieminen
Variadic functions can't be inlined which makes debugging to have quite large function overead. Only aleternative method is to use variadic macros which are inlined so compiler can optimize debugging to minimize overhead.
2009-09-09radeon: Add more verbose error message for failed command buffer.Pauli Nieminen
2009-09-09Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul
Conflicts: Makefile configs/default progs/glsl/Makefile src/gallium/auxiliary/util/u_simple_shaders.c src/gallium/state_trackers/glx/xlib/xm_api.c src/mesa/drivers/dri/i965/brw_draw_upload.c src/mesa/drivers/dri/i965/brw_vs_emit.c src/mesa/drivers/dri/intel/intel_context.h src/mesa/drivers/dri/intel/intel_pixel.c src/mesa/drivers/dri/intel/intel_pixel_read.c src/mesa/main/texenvprogram.c src/mesa/main/version.h
2009-09-09mesa: disable GL_LUMINANCE case in _mesa_meta_draw_pixels()Brian Paul
Works around a bug found on i965. See bug 23670.
2009-09-08i965: fix incorrect test for vertex position attributeBrian Paul
2009-09-04i965: Fix warnings in intel_pixel_read.c.Eric Anholt
(cherry picked from commit c80ce5ac90b1e0ac7a72cd41c314aa2000bfecf5)
2009-09-04intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt
(cherry picked from commit df70d3049a396af3601d2a1747770635a74120bb)
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