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2007-10-05Remove XIDs from DRI interface (see #5714).Kristian Høgsberg
2007-10-04[965] Replace various alignment code with a shared ALIGN() macro.Eric Anholt
In the process, fix some alignment issues: - Scratch space allocation was aligned into units of 1KB, while the allocation wanted units of bytes, so we never allocated enough space for scratch. - GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.
2007-10-04Replace bmBufferOffset usage in batchbuffer setup with OUT_RELOC.Eric Anholt
This is in preparation for 965 TTM.
2007-10-04Replace duplicated intel_reg.h with a shared header.Eric Anholt
2007-10-04Replace some structure-based batch preparation with plain OUT_BATCH.Eric Anholt
OUT_BATCH is far more amenable to the upcoming relocations being done for TTM support.
2007-10-04nouveau: Replace removed device classes with their proper labels.Maarten Maathuis
2007-10-03i915: Only align texture pitch to 64 bytes when textures can be render targets.Michel Dänzer
2007-10-03i915: Work around texture pitch related performance drops on i915 at least.Michel Dänzer
2007-09-29r200: Implement SetTexOffset hook.Chris Rankin
Implementation guidance by Michel Dänzer, final testing by Timo Aaltonen.
2007-09-28add support for LDFLAGS env varDan Nicholson
2007-09-28Go back to using old drm_i915_flip_t field nameJesse Barnes
This field shouldn't have been renamed in the first place. Go back to using the old name so that the tree is backward and forward compatible again.
2007-09-27[965] Add batchbuffer dumping under INTEL_DEBUG=bat, like 915.Eric Anholt
2007-09-27Revert "WIP 965 conversion to dri_bufmgr."Eric Anholt
This reverts commit b2f1aa2389473ed09170713301b042661d70a48e. Somehow I ended up with my branch's save-this-while-I-work-on-master commit actually on master.
2007-09-27WIP 965 conversion to dri_bufmgr.Eric Anholt
2007-09-27[965] Remove AUB file support.Eric Anholt
This code existed to dump logs of hardware access to be replayed in simulation. Since we have real hardware now, it's not really needed.
2007-09-27i965: handle all unfilled mode in clip stage. fix bug #12453Xiang, Haihao
2007-09-27 fix ppracer and bzflag issue with clip optimizationZou Nan hai
2007-09-27i915/i965 merge serer directories along lines for radeon/r200Dave Airlie
2007-09-26i965: The cube map texture coordinates must be devided by theXiang, Haihao
component with the largest absolute value before they are delivered. fix bug #12421
2007-09-26 fix a bug in 965 ARB_occlusion_query,Zou Nan hai
fd.o bug #12132
2007-09-25drm: update bufmgr code to reflect changes in drm interfaceDave Airlie
2007-09-24[i965] Bug #11812: Fix fwrite return value checks in AUB file code.Roland Bär
2007-09-24Remove leftover code for i915_texprog.c noticed in crossbar review.Eric Anholt
2007-09-24Move i915tex driver into place as just i915.Eric Anholt
2007-09-24Remove the old i915 driver now that i915tex works without TTM.Eric Anholt
2007-09-24 fix fd.o bug #12217, recalcuate urb when clip plane size changeZou Nan hai
2007-09-21Merge branch 'i915-unification'Eric Anholt
This branch replaces the DRM pool interface used by i915tex with a "dri_bufmgr" interface in dri/common which may be set up to use either TTM or traditional static memory management according to what is available. The i915tex TTM code now requires an updated DDX which provides proper buffer objects for the static front/back/depth, instead of using fake buffers. The driver is now built as i915_dri.so, and should replace the old i915 driver shortly.
2007-09-21Fix buffer/fence reference counting due to Destroy vs Unreference difference.Eric Anholt
While here, remove the unnecessary fence type saving for the wait ioctl, as a 0 argument for type means "use your other saved copy".
2007-09-20Uniquely validate the batchbuffer-referenced buffers.Eric Anholt
Otherwise, for multiple references by the batchbuffer, the kernel would see the buffer already on the unfenced list and wait for it to leave the list before continuing, leading to hanging and eventual -EBUSY.
2007-09-20Add disabled-by-default tracing of TTM bufmgr operations.Eric Anholt
2007-09-20Fix flipped sign to strerror.Eric Anholt
2007-09-20Merge branch 'master' into i915-unificationEric Anholt
Conflicts: src/mesa/drivers/dri/common/dri_drmpool.c src/mesa/drivers/dri/i915tex/i915_vtbl.c src/mesa/drivers/dri/i915tex/intel_batchbuffer.c src/mesa/drivers/dri/i915tex/intel_context.c
2007-09-20i965: fix an error in brw_vs_tnl.cXiang, Haihao
if the state of TEXMAT is changed, the VS isn't updated.
2007-09-20nouveau: add GeForce 7300 SE to card listDave Airlie
2007-09-19nouveau : nv1x use OUT_RING_CACHE_FORCE for ↵Matthieu Castet
NV10_TCL_PRIMITIVE_3D_PROJECTION_MATRIX as strange results appear when the matrix is partialy updated.
2007-09-19nouveau : add OUT_RING_CACHE_FORCE* to add stuff in the cache even if the ↵Matthieu Castet
value didn't change
2007-09-19nouveau : add GL_FOG_COLOR + fix a compil errorMatthieu Castet
2007-09-19Replace i915tex batchbuffer printout with a pretty-printed version.Eric Anholt
2007-09-19Enable building the debug (env INTEL_DEBUG=list) code by default.Eric Anholt
2007-09-19i915: Quiet valgrind by initializing the seq value the kernel writes into.Eric Anholt
Also, add a couple of comments to the wait/emit IRQ functions.
2007-09-19nouveau: nv10: color logic op only for nv11+Patrice Mandin
2007-09-18Add some error reporting and a couple of assertions to TTM bufmgr.Eric Anholt
2007-09-16nouveau : avoid vertex_size / 4 for each vertex opsMatthieu Castet
2007-09-16nouveau : use GLfloat instead of uint32_t. After all, our vertex attributes ↵Matthieu Castet
are float.
2007-09-16nouveau : implement nv10_render_pointsMatthieu Castet
2007-09-16nouveau : fix nv10_render functionsMatthieu Castet
use _tnl_RenderClipped helper functions that will call the right driver callback clean nv10_render_generic_primitive_elts to match nv10_render style
2007-09-16nouveau : opps I introduce a bug when cleaning vertex pos attribute swap patchMatthieu Castet
2007-09-16nouveau : nv1x pos vertex attribute need to be the first in mesa.Matthieu Castet
Swap it latter in order it match hw format.
2007-09-15nouveau : use new nouveau_reg.h with correct Bracket in macroMatthieu Castet
2007-09-14nouveau : check for nmesa->state_cache.atoms overflowMatthieu Castet
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