| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2010-07-08 | i965: Fix disasm of a SEND's mlen and rlen on Ironlake. | Eric Anholt | |
| 2010-07-08 | i965: Add decode for Sandybridge DP write messages. | Zhenyu Wang | |
| 2010-07-08 | i965: Add definitions for Sandybridge DP write/read messages. | Zhenyu Wang | |
| 2010-07-08 | intel: Update intel_decode.c from intel-gpu-tools. | Eric Anholt | |
| This came from commit cf255e382d147fe3ca450f0dcec3525190e7dcbc | |||
| 2010-07-07 | r600: workaround 3 comp GL_SHORT vertex attribute format on r700 | Andre Maasikas | |
| guess it's a hw errata? | |||
| 2010-07-06 | r300/compiler: Implement KILP opcode. | Tom Stellard | |
| Signed-off-by: Marek Olšák <maraeo@gmail.com> | |||
| 2010-07-03 | r300/compiler: Fix loop unrolling | Tom Stellard | |
| 2010-07-03 | r300/compiler: Use hardware flow control instructions for loops on r500. | Tom Stellard | |
| 2010-07-03 | r300/compiler: Don't continue copy propagation inside loops. | Tom Stellard | |
| 2010-07-03 | r300/compiler: Print debug info for flow control instructions. | Tom Stellard | |
| 2010-07-03 | r300/compiler: Enable hardware IF statements for r500 cards. | Tom Stellard | |
| 2010-07-03 | r300/compiler: In the peephole optimizer, ELSE should mark the end of a | Tom Stellard | |
| block. | |||
| 2010-07-03 | r300/compiler: Correctly calculate the max number of iterations for loops. | Tom Stellard | |
| 2010-07-03 | r300/compiler: Handle loops in deadcode analysis. | Tom Stellard | |
| This also allows us to split the loop emulation into two phases. A tranformation phase which either unrolls loops or prepares them to be emulated, and the emulation phase which unrolls remaining loops until the instruction limit is reached. The second phase is completed after the deadcode analysis in order to get a more accurate count of the number of instructions in the body of loops. | |||
| 2010-07-02 | osmesa: remove old renderbuffer before adding new | Brian Paul | |
| Fixes fd.o bug 10966 when OSMesaMakeCurrent() was called twice. NOTE: This is a candidate for the 7.8 branch. | |||
| 2010-06-28 | mesa: initial support for ARB_geometry_shader4 | Zack Rusin | |
| laying down the foundation for everything and implementing most of the stuff. linking, gl_VerticesIn and multidimensional inputs are left. | |||
| 2010-06-23 | Merge branch 'shader-file-reorg' | Brian Paul | |
| 1. Move all GL entrypoint functions and files into src/mesa/main/ This includes the ARB vp/vp, NV vp/fp, ATI fragshader and GLSL bits that were in src/mesa/shader/ 2. Move src/mesa/shader/slang/ to src/mesa/slang/ to reduce the tree depth 3. Rename src/mesa/shader/ to src/mesa/program/ since all the remaining files are concerned with GPU programs. 4. Misc code refactoring. In particular, I got rid of most of the GLSL-related ctx->Driver hook functions. None of the drivers used them. Conflicts: src/mesa/drivers/dri/i965/brw_context.c | |||
| 2010-06-23 | r300/compiler: allow 1024 instructions in r5xx vertex shaders | Marek Olšák | |
| 2010-06-23 | r300/compiler: allow 32 temporaries in vertex shaders | Marek Olšák | |
| 2010-06-23 | r300/compiler: emulate loops in vertex shaders | Marek Olšák | |
| It is not perfect, but it is the best we got. | |||
| 2010-06-19 | Revert "Fix image_matches_texture_obj() MaxLevel check" | Will Dyson | |
| This reverts commit a9ee95651131e27d5acf3d10909b5b7e5c8d3e92. It was based on a failure to understand how ther driver allocates memory, and causes a regression with Celestia. Set MaxLevel to dstLevel before allocating new mipmap level. The radeon driver will fail to allocate space for a new level that is outside of BaseLevel..MaxLevel. Set MaxLevel before allocating. Signed-off-by: Maciej Cencora <m.cencora@gmail.com> | |||
| 2010-06-18 | intel: Finalize the miptree before mapping it for fallbacks. | Eric Anholt | |
| Fixes segfault in mipmap_view.c demo. Bug #27212. | |||
| 2010-06-18 | i965: Fix the name of aa_coverage_slope in the improved AA line params. | Eric Anholt | |
| 2010-06-16 | intel: Remove unnecessary headers. | Vinson Lee | |
| 2010-06-16 | r600: GL_COORD_REPLACE state is only relevant when point sprites are enabled. | Henri Verbeet | |
| 2010-06-16 | r600: fix warnings | Marc | |
| 2010-06-16 | osmesa: always build standalone for internal symbols | Dan Nicholson | |
| When building OSMesa and xlib GL, the resulting OSMesa would be linked against libGL instead of the internal mesa libraries. However, when building with -fvisibility=hidden, some of the internal functions used in OSMesa could not be resolved through libGL. Instead, always build OSMesa standalone without linking against libGL. This has the advantage that OSMesa is always built the same way, but it means that disk space is wasted when libGL is installed since both libraries will contain the internal objects. Signed-off-by: Dan Nicholson <dbn.lists@gmail.com> Tested-by: Tom Fogal <tfogal@alumni.unh.edu> | |||
| 2010-06-14 | i965: Remove unnecessary header. | Vinson Lee | |
| 2010-06-14 | i965: Fix surface state dumping with INTEL_DEBUG=batch. | Eric Anholt | |
| I broke this with the state streaming changes. | |||
| 2010-06-14 | i965: correct the gen6 line stipple enable define. | Zhenyu Wang | |
| 2010-06-14 | intel: Remove long-dead comment about releasing texture heaps. | Eric Anholt | |
| BOs are stored in the bufmgr, which is freed as part of the screen structure. | |||
| 2010-06-12 | i965: Fix gen6 front cull mode. | Eric Anholt | |
| 2010-06-12 | i965: Use the new message header format for FF_SYNC on gen6. | Zhenyu Wang | |
| 2010-06-12 | i965: Add support for math instructions in the gen6 WM. | Zhenyu Wang | |
| 2010-06-12 | i965: Set the correct WM GRF start reg on gen6. | Zhenyu Wang | |
| 2010-06-12 | i965: Update gen6 paths for the streaming rework. | Eric Anholt | |
| 2010-06-12 | i965: Stream out CC unit state. | Eric Anholt | |
| before: [ # ] backend test min(s) median(s) stddev. count [ 0] gl firefox-talos-gfx 31.791 32.287 1.11% 6/6 after: [ 0] gl firefox-talos-gfx 31.198 31.675 0.96% 6/6 | |||
| 2010-06-12 | r300/compiler: fix scons build | Joakim Sindholt | |
| 2010-06-12 | i965: Remove unnecessary header. | Vinson Lee | |
| 2010-06-11 | r300/compiler: Handle more complex conditionals in loops. | Tom Stellard | |
| 2010-06-11 | r300/compiler: Fix warning. | Tom Stellard | |
| 2010-06-11 | r300/compiler: Handle SGT and SLE at the beginning of loops. | Tom Stellard | |
| 2010-06-11 | r300/compiler: Verify assumptions about opcode types. | Tom Stellard | |
| 2010-06-11 | r300/compiler: Unroll loops that decrement the counter. | Tom Stellard | |
| e.g. for(i=10; i>0; i--) | |||
| 2010-06-11 | r300/compiler: Unroll loops that have a constant number of iterations. | Tom Stellard | |
| This only works with for loops that increment the counter. e.g. for(i=0; i<10; i++) | |||
| 2010-06-11 | r300/compiler: Implement simple loop emulation | Tom Stellard | |
| The loop emulation unrolls loops as may times as possbile while still keeping the shader program below the maximum instruction limit. At this point, there are no checks for constant conditionals. This is only enabled for fragment shaders. | |||
| 2010-06-11 | i965: Remove the surface key used to generate constant surfaces. | Eric Anholt | |
| We had to fill out all that junk when using the cache, but no more. | |||
| 2010-06-11 | i965: Warning fixes from the i965-streaming merge. | Eric Anholt | |
| 2010-06-11 | i965: Use the state base address to avoid relocations. | Eric Anholt | |
| This makes the binding table code simpler, and is required for gen6, which requires binding table addresses to be under 64k offset from the surface state base addr. No significant change in performance on firefox-talos-gfx. | |||
| 2010-06-11 | i965: GC the last two arguments to brw_cache_data. | Eric Anholt | |
| Now that the binding table is streamed indirect state, they were always NULL/0. | |||
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index : android-x86-mesa.git | |
| Androïd/x86 port of Mesa drivers | Hugues Hiegel |
| summaryrefslogtreecommitdiff |