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Some random stuff I had here.
1) Fixed some misleading comments.
2) Removed fake_npot, since it's redundant.
3) lower_texture_rect -> scale_texcoords
4) Reordered and reindented some TEX transform code.
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Fixes:
glsl-fwidth
glsl-derivs-swizzle
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Fixes:
glsl-fs-all-02
glsl-fs-dot-vec2
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These are generated for scalar operands instead of plain equal/nequal.
But for scalars, they're the same anyway. +30 piglits.
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We'd end up reading some non-x component of the float RHS. +53 piglits.
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Not sure how I managed to get tests to succeed without this. +54 piglits.
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This is already NULL'ed in _mesa_init_driver_functions.
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This is only used in the i915 driver where it provides little benefit
for very few applications that use it with fixed function TNL.
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This extension was never enabled in any driver.
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As per discussions at XDS.
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As per discussions at XDS.
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1. We can't turn an instruction into a presubtract operation if it
writes to one of the registers it reads from.
2. If we turn an instruction into a presubtract operation, we can't
remove that intruction unless all readers can use the presubtract
operation.
This fixes fdo bug 30337.
This is a candidate for the 7.9 branch.
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Fix this GCC warning.
intel_pixel_bitmap.c: In function 'intelBitmap':
intel_pixel_bitmap.c:343: warning: implicit declaration of function '_mesa_meta_Bitmap'
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The rest was done with 9aec1288eeae8e87adc9a99f377be536892941b2
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Tested with fbo-generatemipmap-formats GL_EXT_texture_srgb. The test
still fails on SLA8, though.
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taken from Dave's r600g fix
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It always returned 1 (GL_TRUE), which is the same thing that happens when
the driver hook isn't present.
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For this driver, the minimum pitch alignment stuff does appear to be
necessary, so leave the separate munged width/height variable in
place.
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This is already covered by radeon_mipmap_tree.c, and my convolution
cleanups broke in the presence of this code. Thanks to Marek Olšák
for tracking down the relevant miptree code for me.
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The meta code is more general than mine, and appears to pass the same
sets of tests (piglit + some oglconform).
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This broke with the cleanup I did in convolution removal. It's
unnecessary anyway since region_alloc_tiled adjusts pitches for us (64
byte alignment)
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We still retain the fallback override for GL_STENCIL_INDEX, because
the metaops version fails at oglconform.
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More optional code.
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Another optional ARB_imaging subset extension.
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We will typically have a current context when we need to lookup the image,
but the lookup implementation don't need it so drop it.
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Fixes:
glsl1-precision exp2
glsl1-precision log2
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The new checks for sanity in ir_assignment creation got angry about
this write_mask == 0. Fixes:
glsl-fs-dot-vec2.
glsl-fs-atan-2
glsl-fs-dot-vec2
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+113 piglits.
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We can't expect to have a context when this is called, and we don't need one
so just require a __DRIscreen instead.
Reported by Yu Dai <yu.dai@intel.com>
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Fix commit e7087175f8a04f777403366fb34b58edd00f4d60. Move the reference to
GL_VERSION_2_1_functions to intel_extensions.c where it's available,
don't try to enable a non-existing extension and advertise 1.20 for all
intel chipsets, not just GEN4 and up.
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Instead of using the invalid GL_ARB_shading_language_120 extension to
determine the GLSL version, use a new ctx->Const.GLSLVersion field.
Updated the intel and r600 drivers, but untested.
See fd.o bug 29910
NOTE: This is a candidate for the 7.9 branch (but let's wait and see if
there's any regressions).
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Looks like the problem was we weren't passing the depth to the render
target as expected, so the chip would wedge. Fixes GPU hang in
occlusion-query-discard.
Bug #30097
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This is required by the spec, so respect that.
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Use rc_pair_ prefix for all pair instruction structs
Create a named struct for pair instruction args
Replace structs radeon_pair_instruction_{rgb,alpha} with struct
radeon_pair_sub_instruction. These two structs were nearly identical
and were creating a lot of cut and paste code. These changes are the
first step towards removing some of that code.
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