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On pre-gen6, this turns 4 instructions into 1. We could still do
better by folding the saturate into the instruction generating the
value if nobody else uses it, but that should be a separate pass.
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This hits a common case with min/max operations.
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This should make it a lot harder to forget to zero things.
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Fixes glsl-fs-copy-propagation-texcoords-1.
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This should save on the overhead of tree-walking and provide a
convenient place to add more instruction lowering in the future.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
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The vector operator collects 2, 3, or 4 scalar components into a
vector. Doing this has several advantages. First, it will make
ud-chain tracking for components of vectors much easier. Second, a
later optimization pass could collect scalars into vectors to allow
generation of SWZ instructions (or similar as operands to other
instructions on R200 and i915). It also enables an easy way to
generate IR for SWZ instructions in the ARB_vertex_program assembler.
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This may grow in the near future.
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The operate just like ir_unop_sin and ir_unop_cos except that they
expect their inputs to be limited to the range [-pi, pi]. Several
GPUs require this limited range for their sine and cosine
instructions, so having these as operations (along with a to-be-written
lowering pass) helps this architectures.
These new operations also matche the semantics of the
GL_ARB_fragment_program SCS instruction. Having these as operations
helps in generating GLSL IR directly from assembly fragment programs.
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Signed-off-by: Viktor Novotný <noviktor@seznam.cz>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
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This should prevent the field going unset in the future. See bug
http://bugs.freedesktop.org/show_bug.cgi?id=31544 for background.
Also remove unneeded calls to clear_teximage_fields().
Finally, call _mesa_set_fetch_functions() from the
_mesa_init_teximage_fields() function so callers have one less
thing to worry about.
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If an instruction writes reg but nothing later uses it, then we don't
need to bother doing it. Before, we were just killing code that was
never read after it was ever written.
This removes many interpolation instructions for attributes with only
a few comopnents used. Improves nexuiz high-settings performance .46%
+/- .12% (n=3) on my Ironlake.
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Default group bytes to 512 on evergreen. Don't query
tiling config yet for evergreen, the current info returned is not
adequate for evergreen (no way to get bank info).
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Note: this is a candidate for the 7.9 branch.
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Signed-off-by: Francisco Jerez <currojerez@riseup.net>
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Signed-off-by: Francisco Jerez <currojerez@riseup.net>
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Signed-off-by: Francisco Jerez <currojerez@riseup.net>
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Signed-off-by: Francisco Jerez <currojerez@riseup.net>
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Signed-off-by: Francisco Jerez <currojerez@riseup.net>
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See https://bugs.freedesktop.org/show_bug.cgi?id=31544
Note: this is a candidate for the 7.9 branch.
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See https://bugs.freedesktop.org/show_bug.cgi?id=31544
Note: this is a candidate for the 7.9 branch
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See https://bugs.freedesktop.org/show_bug.cgi?id=31544
Note: this is a candidate for the 7.9 branch.
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See https://bugs.freedesktop.org/show_bug.cgi?id=31544
Note: this is a candidate for the 7.9 branch.
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See https://bugs.freedesktop.org/show_bug.cgi?id=31544
Note: this is a candidate for the 7.9 branch
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Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=31617
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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This showed up as cairo-gl gradients being inverted on everyone but
Intel, where I'd apparently tweaked the transformation to work around
the bug. Fixes piglit fbo-fragcoord.
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Silences this GCC warning.
brw_fs.cpp: In member function 'void fs_visitor::split_virtual_grfs()':
brw_fs.cpp:2516: warning: unused variable 'reg'
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Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31560
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Signed-off-by: Robert Hooker <robert.hooker@canonical.com>
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IF statements were getting flattened while they were broken. With
Zhenyu's last fix for ENDIF's type, everything appears to have lined
up to actually work.
This regresses two tests:
glsl1-! (not) operator (1, fail)
glsl1-! (not) operator (1, pass)
but fixes tests that couldn't work before because the IFs couldn't be
flattened:
glsl-fs-discard-01
occlusion-query-discard
(and, naturally, this should be a performance improvement for apps
that actually use IF statements to avoid executing a bunch of code).
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Sometimes we swizzled in a different channel it looked like, and
sometimes we swizzled in zero. Or something.
Having looked at the output of another code generator for this chip,
this is approximately what they do, too: use align1 math on
temporaries, and then move the results into place.
Fixes:
glean/vp1-EX2 test
glean/vp1-EXP test
glean/vp1-LG2 test
glean/vp1-RCP test (reciprocal)
glean/vp1-RSQ test 1 (reciprocal square root)
shaders/glsl-cos
shaders/glsl-sin
shaders/glsl-vs-masked-cos
shaders/vpfp-generic/vp-exp-alias
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Acked-by: Brian Paul <brianp@vmware.com>
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DD_POINT_SIZE got never set for some time now (as it was set only in ifdefed
out code), which caused the r200 driver to use the point primitive mistakenly
in some cases which can only do size 1 instead of point sprite. Since the
logic to use point instead of point sprite prim is flaky at best anyway (can't
work correctly for per-vertex point size), just drop this and always emit point
sprites (except for AA points) - reasons why the driver tried to use points for
size 1.0 are unknown though it is possible they are faster or more conformant.
Note that we can't emit point sprites without point sprite cntl as that might
result in undefined point sizes, hence need drm version check (which was
unnecessary before as it should always have selected points). An
alternative would be to rely on the RE point size clamp controls which could
clamp the size to 1.0 min/max even if the SE point size is undefined, but currently
always use 0 for min clamp. (As a side note, this also means the driver does
not honor the gl spec which mandates points, but not point sprites, with zero size
to be rendered as size 1.)
This should fix recent reports of https://bugs.freedesktop.org/show_bug.cgi?id=702.
This is a candidate for the mesa 7.9 branch.
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This reverts commit 9c39a9fcb2c76897e9b5aff68ce197a411c4e25c.
Remove VS SPF mode, conditional instruction works for VS now.
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That should also be immediate value for type W.
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Fixes 10 piglit cases that were assertion failing.
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Fixes assertion failure with texture swizzling in the GLSL path when
it's triggered (such as gen6 FF or ARB_fp shadow comparisons).
Fixes:
texdepth
texSwizzle
fp1-DST test
fp1-LIT test 3
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Also fixup code comment to reflect that the GPU requires DWORD
alignment, but in this case does not actually pass the value "in
DWORDs" as I previously stated.
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This reverts commit 76360d6abc9e0195bc5c373101ae616e68b2e6e6. On
second thought, it turned out that sync objects also used the
wait_rendering API like this, and would need the same treatment, and
so wait_rendering itself is fixed in libdrm now.
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We were asking for a wait to GTT read (all GPU rendering to it
complete), instead of asking for all GPU reading from it to be
complete. Prevents swapbuffers-based apps from running away with
rendering, and produces a better input experience.
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agd5f: add support to radeon/r200/r300 as well
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